NJU6637 데이터 시트보기 (PDF) - Japan Radio Corporation

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NJU6637

16-CHARACTER 3-LINE DOT MATRIX LCD CONTROLLER DRIVER

Japan Radio Corporation  

Preliminary

NJU6637

s FUNCTIONAL DESCRIPTION

(1)Description for each blocks

(1-1)Register

The NJU6637 incorporates two 8-bit registers, an Instruction Register (IR) and a Data Register (DR).

The Register (IR) stores Instruction codes such as “Clear Display” and “Return Home”, and address

data for Display Data RAM (DD RAM) and Character Generator RAM (CG RAM).

The Register (DR) is a temporary storing register, the data in the Register (DR) is written into the

DD RAM or CG RAM.

The data in the Register (DR) written by the MPU is transferred from the Register automatically to the

DD RAM or CG RAM by Internal operation.

These two registers are selected by the selection signal RS.

(1-2)Address counter (AC)

The address Counter (AC) addresses the DD RAM and CG RAM.

When the address setting instruction is written into the Register (IR), the address information is

transferred from Register (IR) to the counter (AC). The selection of either the DD RAM or CG RAM is

also determined by this instruction.

After writing (or reading) the display data to (or from) the DD RAM or CG RAM, the counter (AC)

increments (or decrements) “1” automatically.

(1-3)Display Data RAM (DD RAM)

The display data RAM (DD RAM) consisting of 48 x 8 bits stores up to 48-character display data

represented in 8-bit code.

The DD RAM address data set in the address Counter (AC) is represented in hexadecimal.

←Higher order bit

Lower order bit→

AC AC6 AC5 AC4 AC3 AC2 AC1 AC0

Hexadecimal

Hexadecimal

(Example) DD RAM address “ 08 ”

0001000

0

8

16-character 2-line Display

1

1st line 00

2nd line 10

3rd line 20

2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 ←Display position

01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ←DD RAMaddress(Hex.)

11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F

21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F

The relation between DD RAM address and display position on the LCD shown below.

[ Left Shift Display ]

(00) ← 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 00

(10) ← 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 10

(20) ← 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 20

[ Right Sift Display ]

0F 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E → (0F)

1F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E → (1F)

2F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E → (2F)

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