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NJU6535 데이터 시트보기 (PDF) - Japan Radio Corporation

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NJU6535
JRC
Japan Radio Corporation  JRC
NJU6535 Datasheet PDF : 30 Pages
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NJU6535
(7) Power on reset circuit initializes
Power on reset circuit initializes the NJU6535 at Power ON and OFF. It generates reset signal to
initialize the system at low VDD less than power down detection voltage (2.5V typical).
(7-1) Initial status in reset
1, Stop the oscillation circuit
2, Display Off (Available Serial data transmission)
3, Disable Key scan function
4, Filled “L” data in all of key data buffer
(7-2) The status of output port terminals in power on reset
Output terminals
SEG1/P0 to SEG4/P3
SEG5 to SEG39
SEG40/COM4
COM1 to COM3
S0/SEG41,S1/SEG42
S2 to S4
S5
SO
Reset status
L *1
L
L *1
L
L *1
X *2
H
H *3
*1 This terminal operates as segment driver and outputs “L”.
*2 This terminal is not fixed the function in/after power on reset until PS0 and PS1 of control data are transmitted.
*3 This terminal consisted of Open-drain output type circuit requires external pull-up resister (1K ohm to 10k)
connect ting to external power source for CPU. I f key data read is executed in power on reset, the read data is
fixed as “H”.
(7-3) Power on reset operation
When the voltage rising time of power source is over than 1mS, the generated signal of VDET initializes
the system of NJU6535 as reset. When the voltage falling time of power source is over than 1mS, the
system is also reset. This status of reset is released automatically at the falling signal of CE terminal after
completed serial data transmission ( Display data D1 to D126 and control data at 1/3 duty, Display data
D1 to D164 and control data at 1/4 duty).
t1
t2
VDD
CE
Internal
data
VDET
Display control
data send
Not fixed
System reset time
Fixed
VDET VDD rising time
VDD falling time
t1>1[ms]
t2>1[ms]
When these voltage rising or falling time of power source are not over than 1ms, the Initialization
operaiton as reset does not operate correctly.
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