NCV8843 데이터 시트보기 (PDF) - ON Semiconductor
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NCV8843 Datasheet PDF : 18 Pages
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NCV8843
102.5
100
97.5
95
92.5
90
−40 −20 0 20 40 60 80 100 120 140
TJ, JUNCTION TEMPERATURE (°C)
Figure 4. Oscillator Frequency Versus Junction
Temperature
An external clock signal can sync the NCV8843 to a
higher frequency. The SYNC pin equivalent input circuit is
shown in Figure 5.
Sync
10k
±33%
VZ = 11V
to 20V
50k
±33%
50k
±33%
Figure 5.
GND
The rising edge of the sync pulse turns on the power
switch to start a new switching cycle, as shown in Figure 6.
There is approximately 0.5 ms delay between the rising edge
of the sync pulse and rising edge of the VSW pin voltage. The
sync threshold is TTL logic compatible, and duty cycle of
the sync pulses can vary from 10% to 90%. The frequency
foldback feature is disabled during the sync mode.
Figure 6. A NCV8843 Buck Regulator is
Synchronized to an External 443 kHz Pulse Signal
Power Switch and Current Limit
The collector of the built−in NPN power switch is
connected to the VIN pin, and the emitter to the VSW pin.
When the switch turns on, the VSW voltage is equal to the
VIN minus switch Saturation Voltage. In the buck regulator,
the VSW voltage swings to one diode drop below ground
when the power switch turns off, and the inductor current is
commutated to the catch diode. Due to the presence of high
pulsed current, the traces connecting the VSW pin, inductor
and diode should be kept as short as possible to minimize the
noise and radiation. For the same reason, the input capacitor
should be placed close to the VIN pin and the anode of the
diode.
The saturation voltage of the power switch is dependent
on the switching current, as shown in Figure 7.
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0
0.5
1.0
1.5
2.0
SWITCHING CURRENT (A)
Figure 7. Power Switch Saturation Versus Switching
Current (Normalized to 1.5 A)
The NCV8843 contains pulse−by−pulse current limiting
to protect the power switch and external components. When
the peak of the switching current reaches the Current Limit,
the power switch turns off after the Current Limit Delay. The
switch will not turn on until the next switching cycle. The
current limit threshold is independent of switching duty
cycle. The maximum load current, given by the following
formula under continuous conduction mode, is less than the
Current Limit due to the ripple current.
IO(MAX)
+
ILIM
*
VO(VIN * VO)
2(L)(VIN)(fs)
where:
fS = switching frequency,
ILIM = current limit threshold,
VO = output voltage,
VIN = input voltage,
L = inductor value.
When the regulator runs under current limit, the
subharmonic oscillation may cause low frequency
oscillation, as shown in Figure 8. Similar to current mode
control, this oscillation occurs at the duty cycle greater than
50% and can be alleviated by using a larger inductor value.
The current limit threshold is reduced to Foldback Current
when the FB pin falls below Foldback Threshold. This
feature protects the IC and external components under the
power up or over−load conditions.
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