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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

NCP1255 데이터 시트보기 (PDF) - ON Semiconductor

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NCP1255 Datasheet PDF : 22 Pages
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NCP1255
If we now plot the peak current set point obtained by implementing the recommended resistor values, we obtain the following
curve (Figure 7):
Peak current setpoint
100%
80%
Vbulk
375
Figure 7. The peak current regularly reduces down to 20% at 375 V dc.
The OPP pin is surrounded by Zener diodes stacked to
protect the pin against ESD pulses. These diodes accept
some peak current in the avalanche mode and are designed
to sustain a certain amount of energy. On the other side,
negative injection into these diodes (or forward bias) can
cause substrate injection which can lead to an erratic circuit
behavior. To avoid this problem, the pin is internal clamped
slightly below –300 mV which means that if more current is
injected before reaching the ESD forward drop, then the
maximum peak reduction is kept to 40%. If the voltage
finally forward biases the internal Zener diode, then care
must be taken to avoid injecting a current beyond –2 mA.
Given the value of ROPPU, there is no risk in the present
example. Finally, please note that another comparator
internally fixes the maximum peak current set point to 0.8 V
even if the OPP pin is adversely biased above 0 V.
Frequency Foldback
The reduction of noload standby power associated with
the need for improving the efficiency, requires a change in
the traditional fixedfrequency type of operation. This
controller implements a switching frequency foldback when
the feedback voltage passes below a certain level, Vfold, set
around 1.9 V. At this point, the oscillator turns into a
VoltageControlled Oscillator and reduces its switching
frequency. Below this point, the frequency no longer
changes and the feedback level still controls the peak current
setpoint. When the feedback voltage reaches 1 V, the peak
current freezes to (250 mV or »31% of the maximum 0.8V
setpoint). If the power continues to decrease, the part enters
skip cycle at a moderate peak current for the best noisefree
performance in noload conditions. Figure 8 depicts the
adopted scheme for the part.
Frequency
Peak current setpoint
Fsw
130 kHz
FB
65 kHz
VCS
max
0.8 V
max
26 kHz
min skip
VFB
400 mV 1.9 V 4 V
1.5 V 3.2 V
Vfold,end Vfold
0.47 V
min
0.25 V
Vskip Vfreeze
0.4 V 1 V
VFB
Vfold 3.2 V
1.9 V
Figure 8. By observing the voltage on the feedback pin, the controller reduces its
switching frequency for an improved performance at light load.
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