NCP1251ASN100T1G 데이터 시트보기 (PDF) - ON Semiconductor

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NCP1251ASN100T1G

Current-Mode PWM Controller for Off-line Power Supplies

ON Semiconductor 

NCP1251

1 vcc 2 vdrv 3 ilprim

23.6 15.9 4.32

1

Vcc (t)

14.8 9.90 3.35

6.05 3.89 2.38

VDRV (t)

−2.72 −2.12 1.41

−11.5 −8.13 445m

2

SS

ILp (t)

500u

1.50m

2.50m

time in seconds

3.50m

3

4.50m

Figure 45. An Auto−Recovery Hiccup Mode is Activated for Faults Longer than 100 ms

Slope Compensation

The NCP1251 includes an internal ramp compensation

signal. This is the buffered oscillator clock delivered only

during the on time. Its amplitude is around 2.5 V at the

maximum duty−cycle. Ramp compensation is a known

means used to cure sub harmonic oscillations in Continuous

Conduction Mode (CCM) operated current−mode

converters. These oscillations take place at half the

switching frequency and occur only during CCM with a

duty−cycle greater than 50%. To lower the current loop gain,

one usually injects between 50% and 100% of the inductor

downslope. Figure 46 depicts how internally the ramp is

generated. Please note that the ramp signal will be

disconnected from the CS pin, during the off time.

2.5 V

0V

latch

reset

ON

+

LEB

−

20k

Rcomp

CS

Rsense

from FB

setpoint

Figure 46. Inserting a Resistor in Series with the Current Sense Information Brings Ramp Compensation and

Stabilizes the Converter in CCM Operation.

In the NCP1251 controller, the oscillator ramp features a

2.5 V swing reached at a 80% duty−ratio. If the clock

operates at a 65 kHz frequency, then the available oscillator

slope corresponds to:

Sramp

+

Vramp,peak

DmaxTSW

+

0.8

2.5

15m

+ 208 kVńs or 208 mVńms

(eq. 10)

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