W26L010AT-12 데이터 시트보기 (PDF) - Winbond

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W26L010AT-12

64K x 16 HIGH-SPEED CMOS STATIC RAM

Winbond 

W26L010A

Timing Waveforms

Read Cycle 1

(Address Controlled, CS = OE = UB = LB = VIL, WE = VIH)

Address

DOUT

TRC

TOH TAA

TOH

Read Cycle 2

(Chip Select Controlled, OE = VIL, WE = VIH)

TRC

Address

CS

OE

UB / LB

DOUT

TACS

TCLZ

TOLZ

TOE

TBA

HIGH-Z

TBLZ

Notes:

1. WE is high for read cycle.

2. Device is continuously selected.

CS = OE = LB = Low

CS = OE = LB = Low

3. Address valid prior to or coincident with CS transition low.

TCHZ

TOHZ

TBHZ

HIGH-Z

-6-

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