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MT90870AG 데이터 시트보기 (PDF) - Zarlink Semiconductor Inc

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MT90870AG
ZARLINK
Zarlink Semiconductor Inc ZARLINK
MT90870AG Datasheet PDF : 86 Pages
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MT90870
Data Sheet
In Connection Mode the contents of the connection memory defines, for each output stream and channel, the
source stream and channel (stored in data memory) to be switched.
In Message Mode, microprocessor data can be written to the connection memory for broadcast on the output
streams on a per channel basis. This feature is useful for transferring control and status information to external
circuits or other ST-BUS devices.
The device uses a master frame pulse (FP8i) and master clock (C8i) to define the frame boundary and timing for
both the Backplane port and the Local port. The device will automatically detect whether an ST-BUS or a GCI-BUS
style frame pulse is being used. There is a two frame delay from the time RESET is de-asserted to the
establishment of full switch functionality. During this period the frame format is determined before switching begins.
The device provides FP8o, FP16o, C8o and C16o outputs to support external devices connected to the Local port.
Subrate switching is accomplished by oversampling (i.e., 1 bit switching can be accomplished by sampling a 2 Mb/s
stream at 16 Mbps). Refer to MSAN-175.
A non-multiplexed Motorola microprocessor port allows programming of the various device operation modes and
switching configurations. The microprocessor port provides access for Register read/write, Connection Memory
read/write and Data Memory read-only operations. The port has a 15-bit address bus, 16-bit data bus and 4 control
signals. The microprocessor may monitor channel data in the Backplane and Local data memories.
The mandatory requirements of the IEEE-1149.1 (JTAG) standard are fully supported via a dedicated test port.
The MT90870 is manufactured in a 27 mm x 27 mm body, 1.27 mm ball-pitch, 272-PBGA to JEDEC standard
MS-034 BAL-2 Iss. A.
3
Zarlink Semiconductor Inc.

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