MT9123AE 데이터 시트보기 (PDF) - Mitel Networks

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MT9123AE

Dual Voice Echo Canceller

Mitel Networks 

Preliminary Information

MT9123

BCLK

PORT1

ENA1

ECA

ECB

ENB1

Rin

Sout

PORT2

8 or 16 bits

8 or 16 bits

ECA

8 or 16 bits

8 or 16 bits

ECB

ENA2

ENB2

Sin

8 or 16 bits

8 or 16 bits

Rout

outputs=High impedance

8 or 16 bits

8 or 16 bits

inputs = don’t care

Note that the two ports are independent so that, for example, PORT1 can operate with 8 bit enable strobes and PORT2

can operate with 16 bit enable strobes.

Figure 9 - SSI Operation

COMMAND/ADDRESS 

Œ

DATA INPUT/OUTPUT

DATA 1

R/W A0 A1 A2 A3 A4 A5 X

D0 D1 D2 D3 D4 D5 D6 D7

SCLK 

CS



Ž

ΠDelays due to internal processor timing which are transparent to the MT9123.

 The MT9123: latches receive data on the rising edge of SCLK

outputs transmit data on the falling edge of SCLK

Ž The falling edge of CS indicates that a COMMAND/ADDRESS byte will be transmitted from the microprocessor. The subsequent

byte is always data followed by CS returning high.

 A new COMMAND/ADDRESS byte may be loaded only by CS cycling high then low again.

 The COMMAND/ADDRESS byte contains: 1 bit - Read/Write

6 bits - Addressing Data

1 bit - Unused

Figure 10 - Serial Microport Timing for Intel Mode 0

8-59

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