MT9041BP 데이터 시트보기 (PDF) - Mitel Networks

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MT9041BP

T1/E1 System Synchronizer

Mitel Networks 

Advance Information

MT9041B

MT9074

TTIP F0i

C4b

TRING

E1.5o

RTIP

RRING

To Controller

LOS

Interrupt

MT9074

TTIP

F0i

C4b

TRING

RTIP E1.5o

RRING

LOS

OUT

IN0

IN1

IN2

IN3

IN4

IN5

IN6

IN7

1 TO 8

MUX

To Controller

Interrupt

MT9041B 20MHz CLOCK

F0o OSCi

C4o

+ 5V

Out

20MHz ±32ppm

FS1

REF FS2

MS

RST

1kΩ

10kΩ

+ 5V

10nF

Figure 9 - Multiple E1 Reference Sources with MT9041B

Multiple E1 Reference Sources with MT9041B

In this example 8 E1 link framers (MT9074) are

connected to a common system backplane clock

using the MT9041B. Each of the extracted clocks

E1.5o go to a mux which selects one of the eight

input clocks as the reference to the MT9041B. The

clock choice is made by a controller using the loss of

signal pin LOS from the MT9074s to qualify potential

references. In the event of loss of signal by one of

the framers, an interrupt signals the controller to

choose a different reference clock. Disturbances in

the generated system backplane clocks C4b and F0b

are minimized by the phase slope limitations of the

MT9041B PLL. This ensures system integrity and

minimizes the effect of clock switchover on

downstream trunks.

9

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