MSM80C85AHRS 데이터 시트보기 (PDF) - Oki Electric Industry

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MSM80C85AHRS

8-Bit CMOS MICROPROCESSOR

Oki Electric Industry 

¡ Semiconductor

MSM80C85AHRS/GS/JS

DRIVING THE X1 AND X2 INPUTS

You may drive the clock inputs of the MSM80C85AH with a crystal, or an external clock source.

The driving frequency must be at least 1 MHz, and must be twice the desired internal clock

frequency; hence, the MSM80C85AH is operated with a 6 MHz crystal (for 3 MHz clock). If a

crystal is used, it must have the following characteristics:

Parallel resonance at twice the clock frequency desired

CL (load capacitance) £ 30 pF

CS (shunt capacitance) £ 7 pF

RS (equivalent shunt resistance) £ 75 ohms

Drive level: 10 mW

Frequency tolerance: ±0.05% (suggested)

Note the use of the capacitors between X1, X2 and ground. These capacitors are required to

assure oscillator startup at the correct frequency.

Figure 4 shows the recommended clock driver circuits. Note in B that a pull-up resistor is

required to assure that the high level voltage of the input is at least 4 V.

For driving frequencies up to and including 6 MHz you may supply the driving signal to X, and

leave X2 open-circuited (Figure 4B). To prevent self-oscillation of the MSM80C85AH, be sure

that X2 is not coupled back to X1 through the driving circuit.

A. Quartz Crystal Clock Driver

X1

MSM80C85AH

C1

CINT = 15 pF

C2

X2

B. 1 - 10 MHz Input Frequency External

Clock Drive Circuit

X1

VIH > 0.8 VCC

High time > 40 ns

Low time > 40 ns

*

X2

33 pF Capacitor required for crystal frequency 10 to 6.25 MHz

50 pF Capacitor required for crystal frequency 6.25 to 4 MHz

100 pF Capacitor required for crystal frequency <4 MHz

* X2 Left Floating

Note: Since the constant values may vary depending on oscillator, consult the manufacturer

of the oscillator used when designing a circuit.

Figure 4 Clock Driver Circuits

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