HB52F649E1 데이터 시트보기 (PDF) - Elpida Memory, Inc

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HB52F649E1

512 MB Registered SDRAM DIMM 64-Mword × 72-bit, 133 MHz Memory Bus, 1-Bank Module (18 pcs of 64 M × 4 Components) PC133SDRAM

Elpida Memory, Inc 

HB52F649E1-75B

DC Characteristics (Ta = 0 to 55°C, VCC = 3.3 V ± 0.3 V, VSS = 0 V)

HB52F649E1-75B

PC133

PC100

CE latency = 4 CE latnecy = 3

Parameter

Symbol Min Max Min Max Unit Test conditions

Notes

Operating current

I CC1

—

Standby current in power ICC2P

—

down

2675 —

749 —

2675

749

mA Burst length = 1

tRC = min

1, 2, 3

mA CKE = VIL, tCK = 12 ns 6

Standby current in power ICC2PS —

down

(input signal stable)

731 —

731

mA CKE = VIL, tCK = ∞

7

Standby current in non

power down

I CC2N

—

Active standby current in ICC3P —

power down

1055 —

767 —

1055

767

mA CKE, S = VIH,

4

tCK = 12 ns

mA CKE = VIL, tCK = 12 ns 1, 2, 6

Active standby current in ICC3N —

non power down

1235 —

1235

mA CKE, S = VIH,

tCK = 12 ns

Burst operating current

I CC4

—

3035 —

2405 mA tCK = min, BL = 4

Refresh current

I CC5

—

4655 —

4655 mA tRC = min

Self refresh current

I CC6

—

749 —

749

mA VIH ≥ VCC – 0.2 V

VIL ≤ 0.2 V

Input leakage current

I LI

–10 10

–10 10

µA 0 ≤ Vin ≤ VCC

Output leakage current

I LO

–10 10

–10 10

µA 0 ≤ Vout ≤ VCC

DQ = disable

1, 2, 4

1, 2, 5

3

8

Output high voltage

VOH

2.4

—

2.4

—

V IOH = –4 mA

Output low voltage

VOL

—

0.4

—

0.4

V IOL = 4 mA

Notes: 1. ICC depends on output load condition when the device is selected. ICC (max) is specified at the

output open condition.

2. One bank operation.

3. Input signals are changed once per one clock.

4. Input signals are changed once per two clocks.

5. Input signals are changed once per four clocks.

6. After power down mode, CK operating current.

7. After power down mode, no CK operating current.

8. After self refresh mode set, self refresh current.

Data Sheet E0021H10

10

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