CXA1977R
Bi-state Totem-pole Output Delay Time Test Load Circuit
Test point
Output from the IC under test
CL
Note 1)
CL = 20pF
3-state Output Test Load Circuit
Test point
Output from the IC under test
VCC
3.9k
S1
1kΩ
CL
Note 1)
Note 2)
S2
CL = 20pF
Test condition S1
tPZL
Close
tPZH
Open
tPLZ
tPHZ
Close
S2
Open
Close
Close
Note 1) CL includes probe capacitance and parasitic capacitance in Test Board.
Note 2) All diodes are IS2076.
Error Rate Test Circuit
SG1
VIN
(FC/2) – 1kHz
CXA1977R
CLK
LATCH
(Threshold level)
DIP SW
B
A ADDER C
A+B
=C
LATCH
C
A>C
COMPA-
A
RATOR
COUNTER
SG2
FC
FC/2
DIVIDER
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