PRELIMINARY INFORMATION
MK3723
I CR O C LOC K
Low Cost 3.3 Volt VCXO
Pin Assignment
MK3723
X1 1
VDD 2
8 X2
7 S1
VIN 3
GND 4
6 VCXOCLK
5 S0
8 pin (150 mil) SOIC
Divider Select Table
S1
S0 VCXOCLK (MHz)
0
0
Crystal ÷2
0
1
Crystal ÷4
1
0
Crystal ÷6
1
1
Crystal ÷8
0 = connect directly to ground
1 = connect directly to VDD
Pin Descriptions
Number Name Description
1
X1 Crystal connection. Connect to a pullable 10 to 20 MHz crystal.
2
VDD VDD. Connect to + 3.3 V.
3
VIN Voltage input to VCXO. Zero to 3.3 V analog input which controls the frequency of the VCXO.
4
GND Connect to ground.
5
S0 Select pin for VCXO divider. See table above.
6 VCXOCLK VCXO clock output. Full CMOS output amplitude.
7
S1 Select pin for VCXO divider. See table above.
8
X2 Crystal connection. Connect to a pullable 16 to 28 MHz crystal.
Crystal Specifications
Correlation (load) capacitance
Initial accuracy
Drift over temperature and aging
C0/C1 ratio
ESR
14 pF
±20 ppm maximum
±50 ppm maximum
240 maximum
35 Ω maximum
MDS 3723 A
2
Revision 082800
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