MIC2566-0BM 데이터 시트보기 (PDF) - Master Instrument Corporation
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MIC2566-0BM Datasheet PDF : 10 Pages
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MIC2566
Timing Diagram
A
VPP
Enable
0
VPP to 3.3V
VPP
OUT
5V
3.3V
t3
t1
B
C
VPP
OFF
VPP to 5V
t5
t7
t2
t4
D
VPP
OFF
t6
t8
Micrel
0
Note.
FLAG
0
Figure 1. MIC2566 VPP Timing Diagram
VPP Enable is shown generically. Refer to the logic tables on the next page for specific control logic input. At time A, VPP = 3.3V. At B, VPP is
disabled. At C, VPP is programmed to 5V. At D, VPP is disabled. RL = 100Ω for all measurements. Load capacitance is negligible.
A
VCC
Enable
0
VCC to 3.3V
5V
3.3V
VCC
OUT
t9
t11
0
B
VCC OFF
C
VCC to 5V
t15
t13
t10
t12
D
VCC OFF
t16
t14
FLAG
0
Note.
Figure 2. MIC2566 VCC Timing Diagram
VCC Enable is shown generically. Refer to the logic tables on the next page for specific control logic input. At time A, VCC is programmed to
3.3V. At B, VCC is disabled. At C, VCC is programmed to 5V. And at D, VCC is disabled. RL = 100Ω. FLAG pull-up resistor is 10kΩ to VCC3 IN.
May 2003
5
MIC2566
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