MCM63P636 데이터 시트보기 (PDF) - Motorola => Freescale

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MCM63P636

64K x 36 Bit Pipelined BurstRAM Synchronous Fast Static RAM

Motorola => Freescale 

D, CW, CR – MW

BR

HIGH–Z4

BW

INTERMEDIATE

HIGH–Z1, 4

CR

INTERMEDIATE

HIGH–Z1, 4

CR

DATA–OUT/

Q(1)VALID1, 2

CR

DATA–OUT/

Q(2)VALID1, 3

CR

DATA–OUT/

CR

Q(3)VALID1, 2

BR

DATA–IN (1)/ MW

HIGH–Z1, 4

CW

DATA–IN (2)/ MW

HIGH–Z1, 4

CW

DATA–IN (3)/ MW

HIGH–Z1, 4

CW

DATA–IN (4)/

HIGH–Z1, 4

CW, MW

HIGH–Z1, 4

CW, MW

MASK (2)/

HIGH–Z1, 4

MW

MASK (3)/

HIGH–Z1, 4

MW

MASK (4)/

HIGH–Z1, 4

MW

HIGH–Z1, 4

MW

CR DATA–OUT/

Q(4)VALID1, 3

DATA–OUT/

Q(4)VALID1, 3 BR

D, CW, CR

NOTES:

1. Command code inputs not shown from this state are not valid.

2. STRBA and STRBB transition from logic 1 to 0. STRBA and STRBB transition from logic 0 to 1.

3. STRBA and STRBB transition from logic 0 to 1. STRBA and STRBB transition from logic 1 to 0.

4. Data strobes are driven to High–Z.

Figure 2. Data I/O State Diagram

MOTOROLA FAST SRAM

MCM63P636

7

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