MCD221FU 데이터 시트보기 (PDF) - Motorola => Freescale
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MCD221FU Datasheet PDF : 10 Pages
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PIN DESCRIPTIONS
SIGNAL DESCRIPTIONS
Host Interface
Mnemonic
A[13 … 1]
D[15 … 0]
CS
R/W
DTACK
INT
IACK
REQ
ACK
RDY
DONE
Type
Name and Function
O System Address Bus. The address must be stable before CS is asserted.
Active HIGH.
B System Data Bus. The data lines must be stable when CS is active during
a write and before DTACK is asserted during a read. Tri–state.
I Chip Select. Used to access the CIAP internal registers and buffers.
Active LOW.
I Read/Write. Indicates the direction of the data transfer. When LOW, the
transfer is to the CIAP.
B Data Transfer Acknowledge. Active LOW. During normal host access,
DTACK is an output indicating that data has been put on (read cycles) or
read from (write cycles) the data bus. (Active pullup.) During DMA,
DTACK is an input indicating that the memory has put data on the data
bus.
O Interrupt. Released when the interrupt status register is read. Active
LOW.
I Interrupt Acknowledge. Active LOW.
O DMA Request. Active LOW.
I Acknowledge. DMA handshake signal indicating that the bus is available
for data transfer. Active LOW.
O Ready. DMA handshake signal indicating that the CIAP has completed
the data transfer. Tri–state. Active LOW. When released by the CIAP, the
output is forced high for a few nanoseconds before it is made tri–state.
I Done. Indicates the last transfer of a DMA burst. Active LOW.
Serial Interface
Mnemonic
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ SCLK
ÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏ MOSI
MISO
ÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎÏÎ MODE_0,
ÏÏÎÏÏÏÏÏÎÏÏÏÏÎÏÏÏÏÎÏÏÏÏÎÏÏÏÏÎÏÏÏÏÎÏÏÏÏÎÏÏÏÏÎÏÏÏÏÎÏÏÏÏÎÏÏÏÏÎÏÏÏÏÎÏÏÏÏÎÏÏÏÏÎÏÏÏÏÎÏÏÏÏÎÏÏÏÏÎÏÏÏÏÎÏÏÏÏÎÏÏÏÏÎÏÏÏÏÎÏÏÏÏÎÏÏÏÏÎÏÏÏÏÎÏ MODE_1
Type
I
I
O
I
Name and Function
Serial Clock.
Serial Data. Master out, slave in.
Serial Data. Master in, slave out.
Serial Interface MODE bits.
00 = Write selected register
01 = Read selected register
10 = Write address
11 = No action
Data Input
Mnemonic
ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ CLI
ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ WSI
ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ DAI
EFI
ÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏÏ SUBCODE/EBU
Type
I
I
I
I
I
Name and Function
Serial Bit Clock Input.
Word Clock Input.
Serial Data Input.
Error Flag Input.
Subcode (P … W) serial data input or EBU input for both main channel
and subchannel.
External Audio Interface
Mnemonic
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ XCLI
ÎÎÏÎÎÏÎÎÏÎÎÏÎÎÏÎÎÏÎÎÏÎÎÏÎÎÏÎÎÏÎÎÏÎÎÏÎÎÏÎÎÏÎÎÏÎÎÏÎÎÏÎÎÏÎÎÏÎÎÏÎÎÏÎÎÏÎÎÏÎÎÏÎÎÏ XWSI
ÏÏÎÎÏÏÎÎÏÏÎÎÏÏÎÎÏÏÎÎÏÏÎÎÏÏÎÎÏÏÎÎÏÏÎÎÏÏÎÎÏÏÎÎÏÏÎÎÏÏÎÎÏÏÎÎÏÏÎÎÏÏÎÎÏÏÎÎÏÏÎÎÏÏÎÎÏÏÎÎÏÏÎÎÏÏÎÎÏÏÎÎÏÏÎÎÏÏÎÎ XDAI
Type
I
I
I
Name and Function
External Audio Serial Bit Clock Input. When not used, the pin must be
connected to VCC or VSS.
External Audio Word Clock Input. When not used, the pin must be
connected to VCC or VSS.
External Audio Data Input. When not used, the pin must be connected to
VCC or VSS.
MOTOROLA
MCD221
2–3
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