78L06 데이터 시트보기 (PDF) - Fairchild Semiconductor

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78L06

3-Terminal 0.1 A Positive Voltage Regulator

Fairchild Semiconductor 

Physical Dimensions

SOT-89

1.87

1.50

C

1.40

4.70

4.30

C

A

0.30 X 45°

B

0.50 X 45°

2.23 MIN

4.50

3.90

C

1.30 1

0.89

0.54

1.50

C

0.35

3

2.70

2.30

C

5.30 MIN

CL SYMM

90°

2

3

3.00

0.52

0.30

(2X)

C

0.10 M C A B

1.70

1.30

C

0.90 MIN 2X

2.00 MIN

1

2

3

1.50

3.00 MIN

0.96 MIN

SEATING PLANE

0.60

0.40

C

1

LAND PATTERN

RECOMMENDATION

0.50

0.35

2.70

2.29

2.13

NOTES: UNLESS OTHERWISE SPECIFIED.

A. REFERENCE TO JEDEC TO-243 VARIATION AA.

B. ALL DIMENSIONS ARE IN MILLIMETERS.

C DOES NOT COMPLY JEDEC STANDARD VALUE.

D. DIMENSIONS ARE EXCLUSIVE OF BURRS,

MOLD FLASH AND TIE BAR PROTRUSION.

E. DIMENSION AND TOLERANCE AS PER ASME

Y14.5-1994.

F. DRAWING FILE NAME: MA03CREV2

Figure 3. 3-Lead, SOT-89, JEDEC TO-243, Option AA

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner

without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or

obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the

warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:

http://www.fairchildsemi.com/packaging/.

For current tape and reel specifications, visit Fairchild Semiconductor’s online packaging area:

http://www.fairchildsemi.com/packaging/tr/sot89_tr.pdf.

© 2002 Fairchild Semiconductor Corporation

MC78LXXA / LM78LXXA Rev. 1.1.0

9

www.fairchildsemi.com

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