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MC74AC323

8Input Universal Shift/Storage Register with Synchronous Reset and Common I/O Pins

ON Semiconductor 

MC74AC323 MC74ACT323

FUNCTIONAL DESCRIPTION

The MC74AC323/74ACT323 contains eight edge-

triggered D-type flip-flops and the interstage logic

necessary to perform synchronous reset, shift left, shift

right, parallel load and hold operations. The type of

operation is determined by S0 and S1 as shown in the Mode

Select Table. All flip-flop outputs are brought out through

3 state buffers to separate I/O pins that also serve as data

inputs in the parallel load mode. Q0 and Q7 are also brought

out on other pins for expansion in serial shifting of longer

words.

A LOW signal on SR overrides the Select inputs and

allows the flip-flops to be reset by the next rising edge of

TRUTH TABLE

Inputs

SR S1 S0 CP

Response

L XX

Synchronous Reset; Q0 – Q7 = LOW

HHH

Parallel Load; I/On → Qn

HLH

Shift Right; DS0 → Q0, Q0 → Q1, etc.

HHL

Shift Left; DS7 → Q7, Q7 → Q6, etc.

H L L X Hold

CP. All other state changes are also initiated by the

LOW-to-HIGH CP transition. Inputs can change when the

clock is in either state provided only that the recommended

setup and hold times, relative to the rising edge of CP, are

observed.

A HIGH signal on either OE1 or OE2 disables the 3-state

buffers and puts the I/O pins in the high impedance state.

In this condition the shift, hold, load and reset operations

can still occur. The 3-state buffers are also disabled by

HIGH signals on both S0 and S1 in preparation for a parallel

load operation.

H = HIGH Voltage Level X = Immaterial

L = LOW Voltage Level

= LOW-to-HIGH Clock Transition

MAXIMUM RATINGS*

Symbol

Parameter

Value

Unit

VCC

DC Supply Voltage (Referenced to GND)

Vin

DC Input Voltage (Referenced to GND)

–0.5 to +7.0

V

–0.5 to VCC +0.5

V

Vout

DC Output Voltage (Referenced to GND)

–0.5 to VCC +0.5

V

Iin

DC Input Current, per Pin

±20

mA

Iout

DC Output Sink/Source Current, per Pin

±50

mA

ICC

DC VCC or GND Current per Output Pin

±50

mA

Tstg

Storage Temperature

–65 to +150

°C

* Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended

Operating Conditions.

RECOMMENDED OPERATING CONDITIONS

Symbol

Parameter

Min

Typ

Max

Unit

VCC

Supply Voltage

′AC

2.0

5.0

6.0

V

′ACT

4.5

5.0

5.5

Vin, Vout

DC Input Voltage, Output Voltage (Ref. to GND)

0

VCC

V

tr, tf

Input Rise and Fall Time (Note 1)

′AC Devices except Schmitt Inputs

VCC @ 3.0 V

150

VCC @ 4.5 V

40

VCC @ 5.5 V

25

ns/V

tr, tf

Input Rise and Fall Time (Note 2)

′ACT Devices except Schmitt Inputs

TJ

Junction Temperature (PDIP)

TA

Operating Ambient Temperature Range

VCC @ 4.5 V

10

VCC @ 5.5 V

8.0

ns/V

140

°C

–40

25

85

°C

IOH

Output Current — High

IOL

Output Current — Low

1. Vin from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times.

2. Vin from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.

–24

mA

24

mA

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