MC33689 데이터 시트보기 (PDF) - Motorola => Freescale
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MC33689 Datasheet PDF : 18 Pages
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Freescale SMeC3m36i8c9onductor, Inc.
Device
Mode
Normal
Stop
Sleep
Table 5-1.
Voltage
Regulator
Wake up
capabilities
Reset output
Watchdog
function
HS1
HS2
HS3
LIN
interface
Opera-
tional
amplifier
Vdd: ON
Vdd ON,
limited current
capability
Vdd OFF, (Set
to 5V after
wake up to
enter Normal
request)
N/A
LIN and
state
change on
Lx inputs
LIN and
state
change on
Lx inputs
- High.
- Active low if Vdd
under voltage occurs
or if W/D fail (if W/D
enable)
- Normally high.
- Active low if Vdd
under voltage occurs
- Low
- Go to high after wake
up and Vdd within
spec
Window WD if
enabled.
Disable
Disable
ON or
OFF
OFF
OFF
Transmit
and
Receive
Recessive
state with
Wake
capability
Recessive
state with
Wake
capability
Active
Not
active
Not
active
Sleep and stop mode enter:
To safely enter sleep or stop mode and to ensure that these modes are not entered by noise issue during SPI transmission, a
dedicated sequence combining bit controlling the LIN bus and the device mode must be send twice.
Enter sleep mode: first and second SPI commands (with bit D6=1, D7=1, D5 =0 or 1, D1=0 and D0=0) 11x0_0000 must be
sent.
Enter stop mode: first and second SPI commands (with bit D6=1, D7=1, D5 =0 or 1, D1=0 and D0=1) 11x0_0001 must be
sent.
Sleep or stop mode is entered after the second SPI command. D5 bit must be set accordingly.
5.9
Window watchdog.
The window watchdog is configurable using external resistor at Wdc pin. The W/D is cleared through mode1 and mode 2 bit is
SPI register. If Wdc pin is left open a fixed watchdog period is selected (typ 150ms). If no watchdog function is required or to
disable the watchdog, the Wdc pin must be connected to gnd. The watchdog period is calculated by the following formula:
Twd = 0.991 * R +0.648 (with R in kohms and Twd in ms).
window closed
window open
no watchdog clear allowed for watchdog clear
Twd * 50%
Twd * 50%
Watchdog period
Twd
Window watchdog operation
Watchdog clear:
The watchdog is cleared by SPI write command with following mode1 and mode2 bits.
Mode 2
0
0
1
1
Mode 1
0
1
0
1
Mode
Sleep mode (note 1)
Stop mode
Normal mode + W/D clear (note 2)
Normal mode
MC33689
14
For More Information On This Product,
Go to: www.freescale.com
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