MC14553BCP 데이터 시트보기 (PDF) - Motorola => Freescale

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MC14553BCP

3-Digit BCD Counter

Motorola => Freescale 

UNITS CLOCK

UNITS Q0

UNITS Q1

UNITS Q2

UNITS Q3

TENS CLOCK

TENS Q0

TENS Q3

HUNDREDS

CLOCK

HUNDREDS Q0

HUNDREDS Q3

DISABLE (DISABLES CLOCK WHEN HIGH)

OVERFLOW

MASTER

RESET

SCAN

OSCILLATOR

DIGIT SELECT 1

DIGIT SELECT 2

DIGIT SELECT 3

UNITS

TENS

HUNDREDS

UP AT 80

UP AT 980

UP AT 800

Figure 1. 3–Digit Counter Timing Diagram (Reference Figure 3)

(a)

PULSE

GENERATOR

16 VDD

C

Q3

Q2

Q1

LE

Q0

O.F.

DIS

DS1

DS2

MR

DS3

8 VSS

(b)

GENERATOR

1

GENERATOR

2

GENERATOR

3

VDD

C

Q3

Q2

Q1

LE

Q0

O.F.

MR

DS1

DS2

DIS

DS3

VSS

CL

CL

CL

CL

CL

20 ns

CLOCK

90%

10%

tPLH

20 ns

BCD OUT

10% 90%

tTLH

OVERFLOW

tPHL

50%

tTHL

CL

CL

CL

CL

CL

CLOCK

LATCH

ENABLE

tTLH

50% 90%

10%

tsu

trem

50%

tPHL, tPLH

BCD OUT

50%

MASTER RESET

tWL(cl)

50%

1/fcl

tPHL

50%

tsu

tPHL

50%

MC14553B

4

Figure 2. Switching Time Test Circuits and Waveforms

tWH(R)

MOTOROLA CMOS LOGIC DATA

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