MC14022 데이터 시트보기 (PDF) - Motorola => Freescale
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MC14022 Datasheet PDF : 7 Pages
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VDD
VSS
VDD
A
S1
VSS
B
CLOCK Q0
ENABLE Q1
Q2
Q3
RESET Q4
Q5
Q6
Q7
CLOCK Cout
VSS
Vout
ID
EXTERNAL
POWER
SUPPLY
Output
Output
Sink Drive Source Drive
Outputs
Carry
VGS =
VDS =
(S1 to A)
Clock to desired
Output
(S1 to B)
Clock to Q5
thru Q7
(S1 to B)
S1 to A
VDD
– VDD
Vout
Vout – VDD
Figure 1. Typical Output Source and Output Sink Characteristics Test Circuit
500 µF
PULSE
fc
GENERATOR
VDD
ID
0.01 µF
CERAMIC
Q0
Q1
CLOCK
Q2
ENABLE
Q3
Q4
RESET
Q5
Q6
Q7
CLOCK
Cout
VSS
CL CL CL CL CL CL CL CL CL
Figure 2. Typical Power Dissipation Test Circuit
APPLICATIONS INFORMATION
Figure 3 shows a technique for extending the number of decoded output states for the MC14022B. Decoded outputs are se-
quential within each stage and from stage to stage, with no dead time (except propagation delay).
CLOCK
MC14022B
96
R
C
CE MC14022B
Q0 Q1 • • • Q6 Q7
7 DECODED
OUTPUTS
R
C
CE MC14022B
Q0 Q1 • • • Q6 Q7
6 DECODED
OUTPUTS
FIRST STAGE
INTERMEDIATE STAGES
Figure 3. Counter Expansion
R
C
CE MC14022B
Q1 • • • Q6 Q7
6 DECODED
OUTPUTS
LAST STAGE
MOTOROLA CMOS LOGIC DATA
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