MC-4532DA726PFB-A80 데이터 시트보기 (PDF) - Elpida Memory, Inc
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MC-4532DA726PFB-A80
Elpida Memory, Inc
MC-4532DA726PFB-A80 Datasheet PDF : 16 Pages
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MC-4532DA726
Synchronous Characteristics
Parameter
Symbol
-A 80
-A 10
Unit Note
Clock cycle time
Access time from CLK
EInput clock frequency
Input CLK duty cycle
Data-out hold time
OData-out low-impedance time
L Data-out high- impedance time
/CAS latency = 3
/CAS latency = 2
/CAS latency = 3
/CAS latency = 2
/CAS latency = 3
/CAS latency = 2
/CAS latency = 3
/CAS latency = 2
tCK3
tCK2
tAC3
tAC2
tOH3
tOH2
tLZ
tHZ3
tHZ2
MIN.
MAX.
MIN.
MAX.
8
(125 MHz) 10 (100 MHz) ns
10 (100 MHz) 13
(77 MHz) ns
6
6
ns
1
6
7
ns
1
50
125
50
100
MHz
40
60
40
60
%
3
3
ns
1
3
3
ns
1
0
0
ns
3
6
3
6
ns
3
6
3
7
ns
Data-in setup time
tDS
2
Data-in hold time
tDH
1
Address setup time
tAS
2
Address hold time
tAH
1
P CKE setup time
tCKS
2
CKE hold time
tCKH
1
CKE setup time (Power down exit)
tCKSP
2
Command (/CS0, /CS2, /RAS, /CAS, /WE, DQMB0 - tCMS
2
r DQMB7) setup time
2
ns
1
ns
2
ns
1
ns
2
ns
1
ns
2
ns
2
ns
Command (/CS0, /CS2, /RAS, /CAS, /WE, DQMB0 - tCMH
1
o DQMB7) hold time
1
ns
Note 1. Output load
d Output
Z = 50 Ω
50 pF
uct Remark These specifications are applied to the monolithic device.
8
Data Sheet E0072N10
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