MC-4532CD646EF-A80 데이터 시트보기 (PDF) - Elpida Memory, Inc
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MC-4532CD646EF-A80
Elpida Memory, Inc
MC-4532CD646EF-A80 Datasheet PDF : 16 Pages
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MC-4532CD646
(2/2)
Byte No.
Function Described
Hex Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Notes
32 Command and address signal input setup 20H 0
0
1
0
0
0
0
0 2 ns
time
33 Command and address signal input
10H 0
0
0
1
0
0
0
0 1 ns
hold time
34 Data signal input setup time
20H 0
0
1
0
0
0
0
0 2 ns
35 Data signal input hold time
10H 0
0
0
1
0
0
0
0 1 ns
E36-61
00H 0
0
0
0
0
0
0
0
62 SPD revision
12H 0
0
0
1
0
0
1
0 1.2
63 Checksum for bytes 0 - 62
-A80 F1H 1
1
1
1
0
0
0
1
O -A10 57H 0
1
0
1
0
1
1
1
64-71 Manufacture’s JEDEC ID code
72 Manufacturing location
73-90 Manufacture’s P/N
91-92 Revision code
L93-94 Manufacturing date
95-98 Assembly serial number
99-125 Mfg specific
126 Intel specification frequency
64H 0
1
1
0
0
1
0
0 100 MHz
127 Intel specification /CAS
-A80 FFH 1
1
1
1
1
1
1
1
P latency support
-A10 FDH 1
1
1
1
1
1
0
1
r Timing Chart
oduct Refer to the µPD45128441, 45128841, 45128163 Data sheet (E0031N).
Data Sheet E0055N10
11
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