MC-4516CD642XS-A75 데이터 시트보기 (PDF) - Elpida Memory, Inc
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MC-4516CD642XS-A75 Datasheet PDF : 14 Pages
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MC-4516CD642XS
Synchronous Characteristics
Parameter
Symbol
-A75
Unit Note
MIN.
MAX.
Clock cycle time
/CAS latency = 3
tCK3
7.5
(133 MHz)
ns
/CAS latency = 2
tCK2
10
(100 MHz)
ns
Access time from CLK
/CAS latency = 3
tAC3
/CAS latency = 2
tAC2
CLK high level width
tCH
2.5
CLK low level width
tCL
2.5
EData-out hold time
/CAS latency = 3
tOH3
3
/CAS latency = 2
tOH2
3
Data-out low-impedance time
tLZ
0
OData-out high-impedance time /CAS latency = 3
tHZ3
3
/CAS latency = 2
tHZ2
3
Data-in setup time
tDS
1.5
Data-in hold time
tDH
0.8
L Address setup time
tAS
1.5
Address hold time
tAH
0.8
CKE setup time
tCKS
1.5
CKE hold time
tCKH
0.8
P CKE setup time (Power down exit)
tCKSP
1.5
Command (/CS0, /CS1, /RAS, /CAS, /WE,
tCMS
1.5
DQMB0 - DQMB7) setup time
r Command (/CS0, /CS1, /RAS, /CAS, /WE,
tCMH
0.8
DQMB0 - DQMB7) hold time
o Note 1. Output load
d Output
Z = 50 Ω
uct Remark These specifications are applied to the monolithic device.
5.4
ns
1
6
ns
1
ns
ns
ns
1
ns
1
ns
5.4
ns
6
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
50 pF
8
Data Sheet E0116N20
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