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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

MAX7480ESA 데이터 시트보기 (PDF) - Maxim Integrated

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MAX7480ESA Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
8th-Order, Lowpass, Butterworth,
Switched-Capacitor Filter
ABSOLUTE MAXIMUM RATINGS
VDD to GND ..............................................................-0.3V to +6V
IN, OUT, COM, OS, CLK ............................-0.3V to (VDD + 0.3V)
SHDN........................................................................-0.3V to +6V
OUT Short-Circuit Duration...................................................1sec
Continuous Power Dissipation (TA = +70°C)
8-Pin SO (derate 5.88mW/°C above +70°C)................471mW
8-Pin DIP (derate 9.09mW/°C above +70°C) ...............727mW
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10sec) .............................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = +5V, filter output measured at OUT, 10k|| 50pF load to GND at OUT, OS = COM, 0.1µF from COM to GND, SHDN =
VDD, fCLK = 100kHz, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
FILTER CHARACTERISTICS
Corner Frequency
Clock-to-Corner Ratio
Clock-to-Corner Tempco
fC
(Note 1)
fCLK / fC
0.001 to 2
100:1
10
kHz
ppm/°C
Output Voltage Range
Output Offset Voltage
VOFFSET VIN = VCOM = VDD / 2
0.25
VDD - 0.25
V
±5
±25
mV
DC Insertion Gain with
Output Offset Removed
VCOM = VDD / 2 (Note 2)
-0.1
0.15
0.3
dB
Total Harmonic Distortion
plus Noise
THD+N
fIN = 200Hz, VIN = 4Vp-p,
measurement bandwidth = 22kHz
-73
dB
OS Voltage Gain to OUT
Input Voltage Range at OS
COM Voltage Range
Input Resistance at COM
Clock Feedthrough
Resistive Output Load Drive
Maximum Capacitive Load at
OUT
Input Leakage Current at COM
Input Leakage Current at OS
CLOCK
Internal Oscillator Frequency
Clock Input Current
Clock Input High
Clock Input Low
AOS
VOS
VCOM
RCOM
Input, COM externally driven
Output, COM internally biased
RL
CL
SHDN = GND, VCOM = 0 to VDD
VOS = 0 to (VDD - 1V) (Note 3)
fOSC
ICLK
VIH
VIL
COSC = 1000pF (Note 4)
VCLK = 0 or 5V
1
VCOM ±0.1
VDD / 2 VDD / 2 VDD / 2
- 0.5
+ 0.5
VDD / 2 VDD / 2 VDD / 2
- 0.2
+ 0.2
75
125
10
10
1
V/ V
V
V
k
mVp-p
k
50
500
pF
±0.1 ±10
µA
±0.1 ±10
µA
40
53
67
kHz
±24 ±40
µA
VDD - 0.5
V
0.5
V
2 _______________________________________________________________________________________

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