Quad, Serial 8-Bit DACs
with Rail-to-Rail Outputs
+5V
0.1µF
SERIAL
INTERFACE
NOT SHOWN
MAX873
R1
330k
0.1%
+2.5V
R2
330k
0.1%
+5V
27
0.1µF
3
ICL7611A 1
6
8
0.1µF
-5V
Figure 14. MAX509 AGND Bias Circuit (Negative Offset)
REFERENCE INPUTS
5 4 17 16
DAC A
+5V
18
VDD
MAX509
2
0.1µF
OUTA
DAC B
1
OUTB
DAC C
20
OUTC
DAC D
VSS
3
0.1µF
-5V
AGND
6
19
OUTD
DGND
8
4-Quadrant Multiplication
Each DAC output may be configured for 4-quadrant
multiplication using Figure 16 and 17's circuit. One op
amp and two resistors are required per channel. With
R1 = R2:
VOUT = VREF [2(NB/256)-1]
where NB represents the digital word in DAC register A.
The recommended value for resistors R1 and R2 is
330kΩ (±0.1%). Table 3 shows the digital code vs. out-
put voltage for Figure 16 and 17's circuit.
______________________________________________________________________________________ 17