1Ω, Low-Voltage, Single-Supply
SPDT Analog Switches
Test Circuits/Timing Diagrams (continued)
MAX4625
VCOM
LOGIC
INPUT
V+
V+
GND
NC
NO
RL
50Ω
VNO
CL
35pF
RL
50Ω
LOGIC VINH
INPUT
VINL
VNC
VNC
CL
35pF
VNQ
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
Figure 3b. Make-Before-Break Interval (MAX4625 only)
0.8 • VOUT
0.8 • VOUT
tMBB
MAX4624
MAX4625
VGEN
RGEN NC
OR NO
GND
V+
V+
COM
IN
VINL TO VINH
VOUT
CL
Figure 4. Charge Injection
VOUT
IN
OFF
∆VOUT
OFF
ON
ON
OFF
OFF
IN
Q = (∆VOUT)(CL)
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
+5V 10nF
0V OR V+ IN
V+
VIN
COM
NC
MAX4624
MAX4625
VOUT
50Ω
NO
GND
NETWORK
ANALYZER
50Ω
50Ω
MEAS
50Ω
REF
50Ω
OFF-ISOLATION = 20log
VOUT
VIN
ON-LOSS = 20log
VOUT
VIN
CROSSTALK = 20log
VOUT
VIN
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS.
OFF-ISOLATION IS MEASURED BETWEEN COM_ AND "OFF" NO_ OR NC_ TERMINAL ON EACH SWITCH.
ON-LOSS IS MEASURED BETWEEN COM_ AND "ON" NO_ OR NC_TERMINAL ON EACH SWITCH.
CROSSTALK IS MEASURED FROM ONE CHANNEL TO ALL OTHER CHANNELS.
SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
Figure 5. On-Loss, Off-Isolation, and Crosstalk
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