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MAX1426CAI(2000) 데이터 시트보기 (PDF) - Maxim Integrated

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MAX1426CAI
(Rev.:2000)
MaximIC
Maxim Integrated MaximIC
MAX1426CAI Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
10-Bit, 10Msps ADC
ELECTRICAL CHARACTERISTICS (continued)
(VAVDD = VCMLP = +5V, VDVDD = +3.3V, VCMLN = VAGND = VDGND = 0, internal reference, digital output loading 35pF, fCLK =
10MHz (50% duty cycle), TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
TIMING CHARACTERISTICS
Conversion Rate
Clock Frequency
Clock High
Clock Low
Pipeline Delay (Latency)
Aperture Delay
Aperture Jitter
Data Output Delay
Bus Enable
Bus Disable
SYMBOL
CONV
fCLK
tCH
tCL
Figure 4
Figure 4
tAD
tAJ
tOD
CONDITIONS
MIN TYP MAX UNITS
0.1
40
50
40
50
5.5
5
7
5
20
10
10
10 MHz
10 MHz
60
ns
60
ns
cycles
ns
ps
25
ns
20
ns
20
ns
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Internal reference, REFIN bypassed to AGND with a 0.1µF capacitor.
External +2.5V reference applied to REFIN.
Internal reference disabled. VREFIN = 0, VREFP = 3.25V, VCML = 2.25V, and VREFN = 1.25V.
Measured as the ratio of the change in midscale offset voltage for a ±5% change in VAVDD using the internal reference.
IMD is measured with respect to either of the fundamental tones.
Specifies the common-mode range of the differential input signal supplied to the MAX1426.
Defined as the input frequency at which the fundamental component of the output spectrum is attenuated by 3dB.
VREFIN is internally biased to +2.5V through a 5kresistor.
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