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M74HC393(1993) 데이터 시트보기 (PDF) - STMicroelectronics

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M74HC393
(Rev.:1993)
ST-Microelectronics
STMicroelectronics ST-Microelectronics
M74HC393 Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
. HIGH SPEED
fMAX = 72 MHz (TYP.) AT VCC = 5 V
. LOW POWER DISSIPATION
ICC = 4 µA (MAX.) AT TA = 25 °C
. HIGH NOISE IMMUNITY
VNIH = VNIL = 28 % VCC (MIN.)
. OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
. SYMMETRICAL OUTPUT IMPEDANCE
|IOH| = IOL = 4 mA (MIN.)
. BALANCED PROPAGATION DELAYS
tPLH = tPHL
. WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V TO 6 V
. PIN AND FUNCTION COMPATIBLE
WITH 54/74LS393
M54HC393
M74HC393
DUAL BINARY COUNTER
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M 54HC 39 3F 1R
M 74H C3 93 M1 R
M 74HC 39 3B 1R
M 74H C3 93 C1 R
PIN CONNECTIONS (top view)
DESCRIPTION
The M54/74HC393 is a high speed CMOS DUAL
BINARY COUNTER fabricated in silicon gate
C2MOS technology. It has the same high speed
performance of LSTTL combined with true COMS
low power consumption.
This counter circuit contains independent ripple
carry counters and two 4-bit ripple carry binary
counters, which can be cascated to create a single
divide by 256 counter.
Each 4-bit counter is incremented on the high to low
transition (negative edge) of the clock input,and
each has an independent clear input. When clear is
set to low all four bits of each counter are set to a
low level. This enables count truncation and allows
the implementation od divide by N counter
configurations.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
NC =
No Internal
Connection
February 1993
1/12

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