Write Cycle Timing
SA24C512 Datasheet
SAIFUN
11
Figure 7. Write Cycle Timing
Note:
The Write cycle time (tWR) is the time from a valid STOP condition of a Write
sequence to the end of the internal erase/program cycle.
Typical System Configuration
Figure 8. Typical System Configuration
Note:
Due to the open-drain configuration of SDA and SCL, a bus-level pull-up resistor
is called for, (typical value = 4.7kΩ).