AT27LV520 데이터 시트보기 (PDF) - Atmel Corporation

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AT27LV520

512K (64K x 8) Multiplexed Addresses/ Outputs Low-voltage OTP EPROM

Atmel Corporation 

AT27LV520

AC Characteristics for Read Operation

VCC = 3.0V to 3.6V and 4.5V to 5.5V

Symbol Parameter

tACC(3)

Address to Output Delay

tCE

Address Latch Enable Low to Output Delay

tAS

Address Setup Time

tAH

Address Hold Time

tALE

tOE(3)

tDF(4)(5)

Address Latch Enable Width

OE/VPP to Output Delay

OE/VPP High to Output Float

tOH

Output Hold from Address or OE/VPP,

whichever occurred first

Note: 3, 4, 5 — see AC Waveforms for Read Operation

Condition

ALE = OE/VPP = VIL

Address Valid

OE/VPP = VIH

OE/VPP = VIH

OE/VPP = VIH

ALE = VIL

ALE = VIL

ALE = VIL

AT27LV520-70

Min

Max

70

55

12

12

40

30

25

7

AT27LV520-90

Min

Max

90

70

15

15

45

35

25

0

Units

ns

ns

ns

ns

ns

ns

ns

ns

AC Waveforms for Read Operation(1)

tALE

ALE

tCE

OE/VPP

AD7 - AD0

tDF

tOH

tAS

tAH tOE

ADDRESS IN

DATA OUT

tACC

A15 - A8

Notes:

1. Timing measurement reference levels for all speed grades are VOL = 0.8V and VOH = 2.0V. Input AC drive levels are VIL =

0.45V and VIH = 2.4V.

2. OE/VPP may be delayed up to tCE - tOE after the address is valid without impact on tCE.

3. OE/VPP may be delayed up to tACC - tOE after the address is valid without impact on tACC.

4. This parameter is only sampled and is not 100% tested.

5. Output float is defined as the point when data is no longer driven.

5

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