LTC1415 데이터 시트보기 (PDF) - Linear Technology
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LTC1415 Datasheet PDF : 24 Pages
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UU
W
FU CTIO AL BLOCK DIAGRA
LTC1415
+AIN
– AIN
VREF
REFCOMP
(4.096V)
AGND
DGND
2k
2.5V REF
REF AMP
CSAMPLE
CSAMPLE
12-BIT CAPACITIVE DAC
ZEROING SWITCHES
+
COMP
–
AVDD
DVDD
INTERNAL
CLOCK
SUCCESSIVE APPROXIMATION
REGISTER
CONTROL LOGIC
12
OUTPUT LATCHES
NAP/SLP SHDN CONVST RD CS BUSY
OVDD
•••
D11
D0
OGND
1415 BD
TEST CIRCUITS
Load Circuits for Access Timing
DBN
1k
5V
1k
DBN
CL
CL
Load Circuits for Bus Relinquish Time
DBN
1k
5V
1k
DBN
100pF
100pF
(A) Hi-Z TO VOH AND VOL TO VOH
(B) Hi-Z TO VOL AND VOH TO VOL
1415 TC01
(A) VOH TO Hi-Z
(B) VOL TO Hi-Z
1415 TC02
7
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