LT5568-2EUF 데이터 시트보기 (PDF) - Linear Technology
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LT5568-2EUF Datasheet PDF : 16 Pages
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LT5568-2
APPLICATIO S I FOR ATIO
The RF output S22 with no LO power applied is given in
Table 4.
Table 4. RF Port Output Impedance vs Frequency for EN = High
and No LO Power Applied
Frequency
MHz
500
600
700
800
900
1000
1100
1200
Input Impedance
Ω
22.7 + j5.6
29.7 + j11.6
40.5 + j11.6
47.3 + j2.2
44.1 – j6.7
38.2 – j9.8
34.0 – j9.4
31.5 – j7.8
Mag
0.381
0.290
0.164
0.037
0.094
0.171
0.218
0.245
S22
Angle
164.0
142.0
121.9
139.6
–126.9
–133.9
–143.1
–151.6
For EN = Low the S22 is given in Table 5.
Table 5. RF Port Output Impedance vs Frequency for EN = Low
Frequency Input Impedance
MHz
Ω
S22
Mag
Angle
500
21.2 + j5.4
0.409
164.9
600
26.6 + j12.5
0.340
142.5
700
36.6 + j16.6
0.241
118.1
800
49.2 + j11.6
0.116
87.4
900
52.9 – j2.0
0.034
–33.1
1000
46.4 – j11.2
0.121
–101.1
1100
39.3 – j13.2
0.188
–120.6
1200
34.4 – j12.1
0.231
–133.8
Note that an ESD diode is connected internally from the
RF output to ground (see Figure 5). For strong output
RF signal levels (higher than 3dBm), this ESD diode can
degrade the linearity performance if the 50Ω termination
impedance is connected directly to ground. To prevent this,
a coupling capacitor can be inserted in the RF output line.
This is strongly recommended during a 1dB compression
measurement.
Enable Interface
Figure 6 shows a simplified schematic of the EN pin
interface. The voltage necessary to turn on the LT5568-2
is 1V. To disable (shut down) the chip, the enable voltage
must be below 0.5V. If the EN pin is not connected, the
chip is disabled. This EN = Low condition is assured by
the 75k on-chip pull-down resistor. It is important that
the voltage at the EN pin does not exceed VCC by more
than 0.5V. If this should occur, the supply current could
be sourced through the EN pin ESD protection diodes,
which are not designed to carry the full supply current,
and damage may result.
VCC
VCC
RF
OUTPUT
21pF
7nH
1pF 51Ω
55682 F05
Figure 5. Equivalent Circuit Schematic of the RF Output
EN
75k 25k
55682 F06
Figure 6. EN Pin Interface
55682f
11
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