LT5558 데이터 시트보기 (PDF) - Linear Technology
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LT5558 Datasheet PDF : 16 Pages
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LT5558
APPLICATIONS INFORMATION
The RF output S22 with no LO power applied is given in
Table 4.
Table 4. RF Port Output Impedance vs Frequency for EN = High
and No LO Power Applied
FREQUENCY
(MHz)(
OUTPUT IMPEDANCE (Ω)
S22
MAG ANGLE
500
23.4 + j5.0
0.367 165.5
600
31.7 + j10.7
0.257 142.0
700
44.1 + j9.5
0.118 116.1
800
50.9 – j1.7
0.019 –60.8
900
46.8 – j11.1
0.118 –99.3
1000
40.8 – j13.5
0.178 –115.5
1100
36.6 – j12.6
0.209 –128.1
1200
34.3 – j10.5
0.222 –139.0
For EN = Low the S22 is given in Table 5.
To improve S22 for lower frequencies, a series capacitor
can be added to the RF output. At higher frequencies, a
shunt inductor can improve the S22. Figure 5 shows the
equivalent circuit schematic of the RF output.
Table 5. RF Port Output Impedance vs Frequency for EN = Low
FREQUENCY
(MHz)
OUTPUT IMPEDANCE (Ω)
S22
MAG ANGLE
500
21.8 + j4.8
0.398 166.5
600
28.4 + j11.8
0.311 142.9
700
40.2 + j15.4
0.200 112.9
800
54.3 + j8.3
0.090
58.1
900
56.7 – j7.2
0.092 –43.3
1000
49.2 – j15.8
0.158 –83.8
1100
41.9 – j17.0
0.203 –105.0
1200
37.3 – j15.3
0.225 –120.0
VCC
21pF
RF
OUTPUT
52Ω
1pF 7nH
5558 F05
Figure 5. Equivalent Circuit Schematic of the RF Output
Note that an ESD diode is connected internally from the
RF output to the ground. For strong output RF signal
levels (higher than 3dBm), this ESD diode can degrade
the linearity performance if an external 50Ω termination
impedance is connected directly to ground. To prevent this,
a coupling capacitor can be inserted in the RF output line.
This is strongly recommended during 1dB compression
measurements.
Enable Interface
Figure 6 shows a simplified schematic of the EN pin inter-
face. The voltage necessary to turn on the LT5558 is 1V.
To disable (shut down) the chip, the enable voltage must
be below 0.5V. If the EN pin is not connected, the chip is
disabled. This EN = Low condition is guaranteed by the
75kΩ on-chip pull-down resistor.
It is important that the voltage at the EN pin does not
exceed VCC by more than 0.5V. If this should occur, the
full-chip supply current could be sourced through the EN
pin ESD protection diodes, which are not designed for this
purpose. Damage to the chip may result.
VCC
EN
75k 25k
5558 F06
Figure 6. EN Pin Interface
Evaluation Board
Figure 7 shows the evaluation board schematic. A good
ground connection is required for the LT5558’s Exposed
Pad. If this is not done properly, the RF performance will
degrade. Additionally, the Exposed Pad provides heat sink-
ing for the part and minimizes the possibility of the chip
overheating. R1 (optional) limits the EN pin current in the
event that the EN pin is pulled high while the VCC inputs
are low. The application board PCB layouts are shown in
Figures 8 and 9.
5558fa
11
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