LT3495(RevA) 데이터 시트보기 (PDF) - Linear Technology

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LT3495
(Rev.:RevA)

650mA/350mA Micropower Low Noise Boost Converter with Output Disconnect

Linear Technology 

LT3495/LT3495B/

LT3495-1/LT3495B-1

PIN FUNCTIONS

GND (Pins 1, 2): Ground. Tie directly to local ground

plane.

VCC (Pin 3): Input Supply Pin. Must be locally by-

passed.

CTRL (Pin 4): Dimming Pin. If not used, tie CTRL to 1.5V

or higher. If in use, drive CTRL below 1.235V to override

the internal reference. See Applications section for more

information.

SHDN (Pin 5): Shutdown Pin. Tie to 1.5V or more to en-

able chip. Ground to shut down.

FB (Pin 6): Feedback Pin. Minimize the metal trace area

to this pin to minimize noise. Reference voltage is 1.235V.

There is an internal 76k resistor from the FB pin to GND. To

achieve the desired output voltage, choose R1 according

to the following formula:

R1 = 76 • (VOUT/1.235 – 1)kΩ

VOUT (Pin 7): Drain of Output Disconnect PMOS. Place a

bypass capacitor from this pin to GND. See Applications

information.

CAP (Pins 8, 9): Source of Output Disconnect PMOS.

Place a bypass capacitor from this pin to GND.

SW (Pin 10): Switch Pin. This is the collector of the in-

ternal NPN power switch. Minimize the metal trace area

connected to this pin to minimize EMI.

Exposed Pad (Pin 11): Ground. This pin must be soldered

to PCB.

BLOCK DIAGRAM

R1

6

FB

76k

INPUT

3

VCC

10

SW

98

CAP CAP

START-UP CONTROL

7

VOUT

CTRL

4

SHDN

5

–

+

+

+

VREF

SWITCH CONTROL

DISCONNECT

CONTROL

SHUNT CONTROL

GND GND

2

1

11

3495 BD

3495b1b1fa

7

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