LT1711IMS8 데이터 시트보기 (PDF) - Linear Technology
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LT1711IMS8 Datasheet PDF : 12 Pages
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LT1711/LT1712
ELECTRICAL CHARACTERISTICS
The q denotes specifications which
V+ = 2.7V or V+ = 5V, V– = 0V, VCM
apply over the
= V+/2, VLATCH
full operating
= 0.8V, CLOAD
temperature range,
= 10pF, VOVERDRIVE
otherwise specifications are at TA = 25°C.
= 20mV, unless otherwise specified.
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX
PSRR– Negative Power Supply Rejection Ratio
– 7V ≤ V– ≤ 0V, V + = 5V, VCM = 5V
60
80
q 58
AV
Small-Signal Voltage Gain (Note 10)
VOH
Output Voltage Swing HIGH
IOUT = 1mA, VOVERDRIVE = 50mV
IOUT = 10mA, VOVERDRIVE = 50mV
VOL
Output Voltage Swing LOW
IOUT = – 1mA, VOVERDRIVE = 50mV
IOUT = – 10mA, VOVERDRIVE = 50mV
I+
Positive Supply Current (Per Comparator)
V+ = 5V, VOVERDRIVE = 1V
I–
Negative Supply Current (Per Comparator) V+ = 5V, VOVERDRIVE = 1V
1
15
q V+– 0.5 V+– 0.2
q V+– 0.7 V+– 0.4
q
0.20
0.4
q
0.35
0.5
15
19
q
26
8
10
q
13
VIH
Latch Pin High Input Voltage
q 2.4
VIL
Latch Pin Low Input Voltage
IIL
Latch Pin Current
VLATCH = V+
q
0.8
q
15
tPD
Propagation Delay (Note 6)
∆VIN = 100mV, VOVERDRIVE = 20mV
∆VIN = 100mV, VOVERDRIVE = 20mV
∆VIN = 100mV, VOVERDRIVE = 5mV
4.5
6.0
q
8.5
5.5
∆tPD
Differential Propagation Delay (Note 6)
∆VIN = 100mV, VOVERDRIVE = 20mV
0.5
1.5
tr
Output Rise Time
10% to 90%
2
tf
Output Fall Time
90% to 10%
2
tLPD
Latch Propagation Delay (Note 7)
5
tSU
Latch Setup Time (Note 7)
1
tH
Latch Hold Time (Note 7)
0
tDPW
Minimum Latch Disable Pulse Width (Note 7)
5
fMAX
Maximum Toggle Frequency
VIN = 100mVP-P Sine Wave
100
tJITTER Output Timing Jitter
VIN = 630mVP-P (0dBm) Sine Wave, f = 30MHz
11
The q denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
V+ = 5V, V– = – 5V, VCM = 0V, VLATCH = 0.8V, CLOAD = 10pF, VOVERDRIVE = 20mV, unless otherwise specified.
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX
V+
Positive Supply Voltage Range
q 2.4
7
V–
Negative Supply Voltage Range (Note 3)
q –7
0
VOS
Input Offset Voltage (Note 4)
∆VOS/∆T Input Offset Voltage Drift
IOS
Input Offset Current
RS = 50Ω, VCM = 0V
RS = 50Ω, VCM = 0V
RS = 50Ω, VCM = 5V
RS = 50Ω, VCM = –5V
0.5
5.0
q
6.0
0.7
1
10
0.2
3
q
6
IB
Input Bias Current (Note 5)
– 18
–5
5
q – 35
10
VCM
CMRR
Input Voltage Range
Common Mode Rejection Ratio
PSRR+ Positive Power Supply Rejection Ratio
PSRR– Negative Power Supply Rejection Ratio
– 5V ≤ VCM ≤ 5V
2.4V ≤ V+ ≤ 7V, VCM = – 5V
– 7V ≤ V– ≤ 0V, VCM = 5V
q – 5.1
5.1
61
75
q 58
58
85
q 56
60
80
q 58
UNITS
dB
dB
V/mV
V
V
V
V
mA
mA
mA
mA
V
V
µA
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
psRMS
UNITS
V
V
mV
mV
mV
mV
µV/°C
µA
µA
µA
µA
V
dB
dB
dB
dB
dB
dB
3
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