LM3S2965 데이터 시트보기 (PDF) - Unspecified

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LM3S2965

Microcontroller

Unspecified 

Table of Contents

6.1.3

6.1.4

6.1.5

6.2

6.3

6.4

7

7.1

7.2

7.2.1

7.2.2

7.2.3

7.2.4

7.2.5

7.2.6

7.2.7

7.3

7.3.1

7.3.2

7.3.3

7.3.4

7.3.5

7.4

7.5

8

8.1

8.2

8.2.1

8.2.2

8.3

8.3.1

8.3.2

8.4

8.5

8.6

9

9.1

9.1.1

9.1.2

9.1.3

9.1.4

9.1.5

9.1.6

9.2

9.3

9.4

Power Control ........................................................................................................................... 63

Clock Control ............................................................................................................................ 63

System Control ......................................................................................................................... 65

Initialization and Configuration ................................................................................................... 66

Register Map ............................................................................................................................ 66

Register Descriptions ................................................................................................................ 67

Hibernation Module .......................................................................................................... 121

Block Diagram ........................................................................................................................ 122

Functional Description ............................................................................................................. 122

Register Access Timing ........................................................................................................... 122

Clock Source .......................................................................................................................... 123

Battery Management ............................................................................................................... 123

Real-Time Clock ...................................................................................................................... 123

Non-Volatile Memory ............................................................................................................... 124

Power Control ......................................................................................................................... 124

Interrupts and Status ............................................................................................................... 124

Initialization and Configuration ................................................................................................. 125

Initialization ............................................................................................................................. 125

RTC Match Functionality (No Hibernation) ................................................................................ 125

RTC Match/Wake-Up from Hibernation ..................................................................................... 125

External Wake-Up from Hibernation .......................................................................................... 126

RTC/External Wake-Up from Hibernation .................................................................................. 126

Register Map .......................................................................................................................... 126

Register Descriptions .............................................................................................................. 127

Internal Memory ............................................................................................................... 140

Block Diagram ........................................................................................................................ 140

Functional Description ............................................................................................................. 140

SRAM Memory ........................................................................................................................ 140

Flash Memory ......................................................................................................................... 141

Flash Memory Initialization and Configuration ........................................................................... 142

Flash Programming ................................................................................................................. 142

Nonvolatile Register Programming ........................................................................................... 143

Register Map .......................................................................................................................... 143

Flash Register Descriptions (Flash Control Offset) ..................................................................... 144

Flash Register Descriptions (System Control Offset) .................................................................. 151

General-Purpose Input/Outputs (GPIOs) ....................................................................... 164

Functional Description ............................................................................................................. 164

Data Control ........................................................................................................................... 165

Interrupt Control ...................................................................................................................... 166

Mode Control .......................................................................................................................... 167

Commit Control ....................................................................................................................... 167

Pad Control ............................................................................................................................. 167

Identification ........................................................................................................................... 167

Initialization and Configuration ................................................................................................. 167

Register Map .......................................................................................................................... 169

Register Descriptions .............................................................................................................. 170

4

November 30, 2007

Preliminary

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