LH28F040SUT-Z4 데이터 시트보기 (PDF) - Sharp Electronics

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LH28F040SUT-Z4

4M (512K × 8) Flash Memory

Sharp Electronics 

4M (512K × 8) Flash Memory

LH28F040SUTD-Z4

PIN DESCRIPTION

SYMBOL

TYPE

NAME AND FUNCTION

A0 - A13 INPUT

BYTE-SELECT ADDRESSES: Select a byte within one 16K block. These addresses

are latched during Data Writes.

A14 - A17 INPUT

BLOCK-SELECT ADDRESSES: Select 1 of 16K Erase blocks. These addresses

are latched during Data Writes, Erase and Lock-Block operations.

DQ0 - DQ7

INPUT/OUTPUT

DATA INPUT/OUTPUT: Inputs data and commands during CUI write cycles.

Outputs array, buffer, identifier or status data in the appropriate Read mode.

Floated when the chip is de-selected or the outputs are disabled.

BE »0, BE»1 INPUT

BANK ENABLE INPUTS: Activate the device's control logic, input buffers, decoders

and sense amplifiers. CE» must be low to select the device. When BE»0 is low,

bank0 is active. When BE»1 is low, bank1 is active. Both BE»0 and BE»1 must not be

low at the same time.

OE »

INPUT

OUTPUT ENABLE: Gates device data through the output buffers when low. The

outputs float to tri-state off when OE» is high.

WE

INPUT

WRITE ENABLE: Controls access to the CUI, Page Buffers, Data Queue Registers

and Address Queue Latches. WE is active low, and latches both address and data

(command or array) on its rising edge.

VPP

SUPPLY

ERASE/WRITE POWER SUPPLY (5.0 V ±0.5 V): For erasing memory array blocks

or writing bytes into the flash array.

VCC

GND

SUPPLY

SUPPLY

DEVICE POWER SUPPLY (3.3 V ±0.3 V): Do not leave any power pins floating.

GROUND FOR ALL INTERNAL CIRCUITRY: Do not leave any ground pins floating.

NC

NO CONNECTION

NC1, NC2

OPEN PIN: But NC1 (between pin1 and pin2) and also NC2 (pin19 and pin20) are

connected inside package.

INTRODUCTION

Sharp’s LH28F040SUTD-Z4 4M Flash Memory is a

revolutionary architecture which enables the design of

truly mobile, high performance, personal computing and

communication products. With innovative capabilities,

3.3 V low power operation and very high read/write per-

formance, the LH28040SU-Z4 is also the ideal choice

for designing embedded mass storage flash memory

systems.

The LH28F040SUTD-Z4 is a very high density, high-

est performance non-volatile read/write solution for solid-

state storage applications. Its independently lockable

32 symmetrical blocked architecture (16K each)

extended cycling, low power operation, very fast write

and read performance and selective block locking pro-

vide a highly flexible memory component suitable for

high density memory cards, Resident Flash Arrays and

PCMCIA-ATA Flash Drives. The LH28F040SUTD-Z4’s

5.0 V/3.3 V power supply operation enables the design

of memory cards which can be read in 3.3 V system

and written in 5.0 V/3.3 V systems. Its x8 architecture

allows the optimization of memory to processor inter-

face. The flexible block locking option enables bundling

of executable application software in a Resident Flash

Array or memory card. Manufactured on Sharp’s 0.55

µm ETOX™ process technology, the LH28F040SUTD-

Z4 is the most cost-effective, high-density 3.3 V flash

memory.

LH28F040SUTD-Z4 divides 4M into two areas. Each

area can read/write/erase independently. For example,

while you write and erase on one area, you can simul-

taneously read the data from the other area. This

enables users to reduce the number of components in

their system.

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