LC74725 데이터 시트보기 (PDF) - SANYO -> Panasonic

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LC74725

On-Screen Display Controller LSI

SANYO -> Panasonic 

LC74725, 74725M

Note: CPDT goes to the high-impedance state when CS2 is high.

Figure 2 EDS Serial Output Test Conditions (N-Channel Open-Drain Circuit)

Note: The O/E signal is output from the SYNCJDG pin when SEL0 is high.

LN21 outputs the even field when MOD0 is low, and both fields when MOD0 is high.

Figure 3 O/E and LN21 Output Timing

No. 5213-5/16

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