L6712AQTR 데이터 시트보기 (PDF) - STMicroelectronics

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L6712AQTR

TWO-PHASE INTERLEAVED DC/DC CONTROLLER

STMicroelectronics 

L6712A L6712

Figure 2. Block Diagram

PGOOD

BAND-GAP

REFERENCE

OSC / INH

SGND

PWM1

VCCDR

HS

VID2

VID1

VID0

REF_IN/OUT

DAC

DIGITAL

SOFT-START

LOGIC AND

PROTECTIONS

VCC

VCCDR

CH1 OCP CH2 OCP

TOTAL

CURRENT

VPROG

CH1

LS

OCP

CH2

OCP

CURRENT

READING

CURRENT

READING

LS

FBG

FBR

REMOTE

AMPLIFIER

PWM2

HS

Vcc

ERROR

AMPLIFIER

VSEN

DROOP FB

COMP

Vcc

BOOT1

UGATE1

PHASE1

LGATE1

ISEN1

PGNDS1

PGND

PGNDS2

ISEN2

LGATE2

PHASE2

UGATE2

BOOT2

Table 2. Absolute Maximum Ratings

Symbol

Parameter

VCC, VCCDR To PGND

VBOOT-VPHASE Boot Voltage

VUGATE1-VPHASE1

VUGATE2-VPHASE2

LGATE1, PHASE1, LGATE2, PHASE2 to PGND

VID0 to VID2

All other pins to PGND

VPHASEx

Sustainable Peak Voltage. T<20ns @ 600kHz

UGATEX Pins

OTHER PINS

Maximum Withstanding Voltage Range

Test Condition: CDF-AEC-Q100-002”Human Body Model”

Acceptance Criteria: “Normal Performance”

Value

15

15

15

-0.3 to Vcc+0.3

-0.3 to 5

-0.3 to 7

26

±1500

±2000

Unit

V

V

V

V

V

V

V

V

V

Table 3. Thermal Data

Symbol

Rthj-amb

Tmax

Tstg

Tj

PMAX

Parameter

Thermal Resistance Junction to Ambient

4 layer PCB (2s2p)

Maximum junction temperature

Storage temperature range

Junction Temperature Range

Max power dissipation at Tamb = 25°C

SO28

60

VFQFPN36 Unit

30

°C/W

150

150

°C

-40 to 150 -40 to 150

°C

-40 to 125 -40 to 125

°C

2

3.5

W

2/29

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