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L6712AD(2004) 데이터 시트보기 (PDF) - STMicroelectronics

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L6712AD
(Rev.:2004)
ST-Microelectronics
STMicroelectronics ST-Microelectronics
L6712AD Datasheet PDF : 27 Pages
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L6712A L6712
PIN FUNCTION
N. (*)
SO VFQFPN
1
33
2
34
3
35
4
36
5
2
6
4
7
5,6
8
7
9
8
10
9
11
11
12
12
13
13
14
14
15
15
Name
LGATE1
VCCDR
PHASE1
UGATE1
BOOT1
VCC
SGND
COMP
FB
DROOP
REF_IN /
OUT
VSEN
ISEN1
PGNDS1
PGNDS2
Description
Channel 1 LS driver output.
A little series resistor helps in reducing device-dissipated power.
LS drivers supply: it can be varied from 5V to 12V buses.
Filter locally with at least 1µF ceramic cap vs. PGND.
Channel 1 HS driver return path. It must be connected to the HS1 mosfet source
and provides the return path for the HS driver of channel 1.
Channel 1 HS driver output.
A little series resistor helps in reducing device-dissipated power.
Channel 1 HS driver supply. This pin supplies the relative high side driver.
Connect through a capacitor (100nF typ.) to the PHASE1 pin and through a diode
to VCC (cathode vs. boot).
Device supply voltage. The operative supply voltage is 12V ±10%.
Filter with 1µF (Typ.) capacitor vs. GND.
All the internal references are referred to this pin. Connect it to the PCB signal
ground.
This pin is connected to the error amplifier output and is used to compensate the
control feedback loop.
This pin is connected to the error amplifier inverting input and is used to
compensate the control feedback loop.
A current proportional to the sum of the current sensed in both channel is
sourced from this pin (50µA at full load, 70µA at the Constant Current threshold).
Short to FB to implement the Droop effect: the resistor connected between FB
and VSEN (or the regulated output) allows programming the droop effect.
Otherwise, connect to GND directly or through a resistor (43kmax) and filter
with 1nF capacitor. In this last case, current information can be used for other
purposes.
Reference input/output. Filter vs. GND with 1nF ceramic capacitor (a total of
100nF capacitor is allowed).
It reproduces the reference used for the regulation following VID code: when
VID=111, the reference for the regulation must be connected on this pin.
References ranging from 0.800V up to 3.300V can be accepted.
Connected to the output voltage it is able to manage Over & Under-voltage
conditions and the PGOOD signal. It is internally connected with the output of the
Remote Sense Amplifier for Remote Sense of the regulated voltage.
Connecting 1nF capacitor max vs. GND can help in reducing noise injection at
this pin.
If no Remote Sense is implemented, connect it directly to the regulated voltage in
order to manage OVP, UVP and PGOOD.
Channel 1 current sense pin. The output current may be sensed across a sense
resistor or across the low-side mosfet RdsON. This pin has to be connected to the
low-side mosfet drain or to the sense resistor through a resistor Rg.
The net connecting the pin to the sense point must be routed as close as
possible to the PGNDS net in order to couple in common mode any picked-up
noise.
Channel 1 Power Ground sense pin. The net connecting the pin to the sense
point must be routed as close as possible to the ISEN1 net in order to couple in
common mode any picked-up noise.
Channel 2 Power Ground sense pin. The net connecting the pin to the sense
point must be routed as close as possible to the ISEN2 net in order to couple in
common mode any picked-up noise.
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