KS0068B 데이터 시트보기 (PDF) - Samsung
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KS0068B Datasheet PDF : 22 Pages
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KS0068B
16COM/60SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Î DC Characteristics (VDD=+3Vä10%, VSS=0V, Ta=-30 ~ +85 )
Characteristic
Symbol
Test condition
Min Typ Max Unit Applicable Pin
Operating Voltage
Operating Current (*1)
VDD
-
2.7 3.0 3.3
V
IDD1
Ceramic resonator
-
0.3 0.5 mA
fosc=250KHz
IDD2
Resistor oscillation
-
external clock operation
0.17 0.3
fosc=270KHz
Input Voltage 1
High
VIH1
-
1.9
-
VDD
V
E, DB0-DB7,
Low
VIL1
-
-0.3
-
0.4
R/W, RS
Input Voltage 2
High
VIH2
-
0.7VDD
-
VDD
OSC1
Low
VIL2
-
-
-
0.2VDD
Output Voltage 1
Output Voltage 2
Voltage Drop (*2)
Input leakage current
High
Low
High
Low
COM
SEG
VOH1
VOL1
VOH2
VOL2
VdCOM
VdSEG
ILKG
IOH=-0.1mA
IOL=0.1mA
À IO=-40
À IO=40
IO=ä0.05mA
VIN=0 or VDD
2.0
-
-
-
-
0.4
DB0-DB7
0.8VDD
-
-
-
-
0.2VDD
-
-
1
CLK1, CLK2,
M, D
C1-C16
-
-
1.5
-1
-
1À
S1-S60
E
Input Low Current
IIN
VDD=3V (test pull up R) -10
-50 -120
RS,R/W
External Clock
Frequency
fEC
(*3)
125 250 350 KHz
OSC1
Duty
duty
Rise time
tR
Fall time
tF
Internal clock Frequency(*3)
fOSC
-
< Rf=75K ä2%
45
50
55
%
-
-
¶ 0.2
-
-
¶ 0.2
190 270 350 KHz OSC1, OSC2
LCD Driving Voltage(*4)
VLCD1
VDD-V5
1/5 bias
3.0
VLCD2
1/4 bias
3.0
-
10.0 V
-
10.0
V1-V5
Note: *1) : The supply current value from VDD when power condition is as follows
VDD = 5V, VSS = 0V, V5 = -2V
VDD = 3V, VSS = 0V, V5 = -2V
*2) : The voltage drop from LCD bias terminals VDD, V1, V4 and V5 to each common terminal (C1-C16)
and also to voltage drop LCD bias terminals VDD, V2, V3 and V5 to each segment terminal (S1-S80)
*3) and *4) : Refer to oscillator circuit and input the voltage listed in the table bellow to v1 ~ v5.
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