KK8040 데이터 시트보기 (PDF) - Kodenshi Auk Co., LTD
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KK8040 Datasheet PDF : 4 Pages
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KK8040
BLOCK DIAGRAM
OSC1
OSC2
SEL1
SEL2
MT
OSCI L LA TOR
CONTROL
RHYTHM
ROM
TEMPO ROM
RHYTHM
GENERATOR
A CCOMPA NMENT
GENERATOR
MELODY
ROM
MELODY ROM
A DDRESS
COUNTER
CONTROL ROM
TONE
GENERATOR
ENVELOPE
MI X ER
ENVELOPE
MI X ER
DRI V ER
ENV1
ENV2
MO
B/ E
P1
OUT1
OUT2
PIN DESCRIPTION
Pin. No. Pin Name
1
OSC1
2
OSC2
3
TST2
Pull-Down
Resistor
-
-
Provided
4
MT
Provided
5
SEL2
Provided
6
SEL1
7
B/E
8
VSS
9
TST1
10
ENV1
11
ENV2
12
MO
13
P1
14
OUT1
15
OUT2
16
VDD
Provided
-
-
Provided
-
-
-
Provided
-
Functions
A resistor is connected between both terminals to from a ring
oscillator, or external reference signals are applied to OSC1.
LSI Test Input/Output.
For binary selection: Controls Start and Stop of Performance.
For direct selection: Selects Melody 1 and Controls Start and Stop of it’s
Performance.
For binary selection: this Terminal in Conjunction with SEL1, selects a Melody.
For direct selection: Selects Melody 3 and Controls Start and Stop of it’s
Performance.
For binary selection: this Terminal in Conjunction with SEL1, selects a Melody.
For direct selection: Selects Melody 2 and Controls Start and Stop of it’s
Performance.
BUSY or END Signal Output Terminal.
Power Supply Terminal (0V).
LSI Test Input.
Connects Resistor and Capacitor to add Envelope to Main Melody.
Connects Resistor and Capacitor to add Envelope to Accompaniment.
Output Terminal or Acoustic Signals that have not been Amplified.
Connects PNP/NPN Transistors, resistors and Capacitors to form
a Low-Frequency Linear Amplifier Circuit.
3.0V to 5.0V Operating Voltage
2
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