YTD421B 데이터 시트보기 (PDF) - Yamaha Corporation

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YTD421B

ISDN Driver/Receiver

Yamaha Corporation 

8

CHAPTER 3. PIN DESCRIPTIONS

3.2 Pin Functions

3.2.1 Common Section

Pin No. Pin Name I/O

9,13 VDD

PWR

1,16 VSS

GND

11 RX

{

15 CX1

{

18 CX2

{

10 SLEEP IN

Function

+5V65% Power supply

Ground

Connect via a 27 k resistor to Ground

Connect via a 22 F condenser to Ground

Connect via a 0.1 F condenser to Ground

Sleep Mode

\H": Standby (Low power consumption) mode

\L": Active mode

Note 1: When making SLEEP pin \H", connects it to VDDO power source pin.

Remarks

Note 1

3.2.2 Receiver Section

Pin No. Pin Name I/O

4 HRD

OUT

3 LRD

OUT

20 LI1

IN

17 LI2

IN

19 LICT

OUT

5 ODSEL IN

2 VDDO PWR

Function

High Pulse of Receive Data

Outputs the high pulse of received AMI signal

TTL interface

Low Pulse of Receive Data

Outputs the low pulse of received AMI signal

TTL interface

S/T Line Input (positive)

Inputs S/T interface data through a pulse transformer

S/T Line Input (negative)

Inputs S/T interface data through a pulse transformer

S/T Line Reference Source Output

Connects to the pulse transformer's center tap

HRD, LRD Output Select

\H": HRD pin, LRD pin normal output

(positive polarity)

\L": HRD pin, LRD pin open drain

(negative polarity)

Power Source for HRD, LRD

Connects to the power source of the circuit which HRD pin

and LRD pin are connected to.

It enables the interface with +3.3V circuit.

Remarks

Note 2

Note 2

Note 3

Note 4

Note 2: When pulling HRD pin and LRD pin up via pull-up resistors, pulls them up to VDDO power source

pin.

Note 3: When making ODSEL pin \H", connects it to VDDO power source pin.

Note 4: \positive polarity" means the condition that voltage level = \H" when logic = binary \0". \negative

polarity" means the condition that voltage level = \L" when logic = binary \0".

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