K4S561632B 데이터 시트보기 (PDF) - Samsung
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K4S561632B Datasheet PDF : 11 Pages
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K4S561632B
CMOS SDRAM
DC CHARACTERISTICS
(Recommended operating condition unless otherwise noted, TA = 0 to 70°C)
Parameter
Symbol
Test Condition
Operating current
(One bank active)
Burst length = 1
ICC1 tRC ≥ tRC(min)
IO = 0 mA
Precharge standby current in
power-down mode
Precharge standby current in
non power-down mode
ICC2P
ICC2PS
ICC2N
CKE ≤ VIL(max), tCC = 10ns
CKE & CLK ≤ VIL(max), tCC = ∞
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
ICC2NS
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
Active standby current in power-
down mode
Active standby current in
non power-down mode
(One bank active)
ICC3P
ICC3PS
ICC3N
ICC3NS
CKE ≤ VIL(max), tCC = 10ns
CKE & CLK ≤ VIL(max), tCC = ∞
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
Operating current
(Burst mode)
IO = 0 mA
ICC4 Page burst
4banks Activated.
tCCD = 2CLKs
Refresh current
ICC5 tRC ≥ tRC(min)
Self refresh current
ICC6 CKE ≤ 0.2V
C
L
Notes : 1. Measured with outputs open.
2. Refresh period is 64ms.
3. K4S561632B-TC**
4. K4S561632B-TL**
5. Unless otherwise noticed, input swing level is CMOS(VIH/VIL=VDDQ/VSSQ).
Version
Unit Note
-75 -1H -1L
150 140 140 mA
1
2
mA
2
16
mA
14
6
mA
6
35
mA
30
mA
180 145 145 mA
1
220 210 210 mA
2
3
mA
3
2
mA
4
Rev. 0.2 May.2000
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