ISL97651 데이터 시트보기 (PDF) - Intersil
부품명
상세내역
일치하는 목록
ISL97651 Datasheet PDF : 19 Pages
| |||
ISL97651
Electrical Specifications
VIN = 5V, VBOOST = VSUP = 15V, VON = 25V, VOFF = -8V, over-temperature from -40°C to +105°C; Parameters
with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits
established by characterization and are not production tested. (Continued)
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP MAX UNIT
FAULT DETECTION THRESHOLDS
T_off
Thermal Shut-Down (latched and
reset by power cycle or EN cycle)
Temperature rising
150
°C
Vth_AVDD(FBB) AVDD Boost Short Detection
V(FBB) falling less than
Vth_VLOGIC(FBL) VLOGIC Buck Short Detection
V(FBL) falling less than
Vth_POUT(FBP) POUT Charge Pump Short Detection V(FBP) falling less than
Vth_NOUT(FBN) NOUT Charge Pump Short Detection V(FBN) rising more than
tFD
Fault Delay Time to Chip Turns Off CDEL = 220nF
START-UP SEQUENCING
0.9
V
0.9
V
0.9
V
0.4
V
52
ms
tSTART-UP
IDELB_ON
Enable to AVDD Start Time
DELB Pull-Down Current or
Resistance when Enabled by the
Start-Up Sequence
CDEL = 220nF
VDELB > 0.9V
VDELB < 0.9V
36
1000
80
ms
50
70
µA
1326 1750
Ω
IDELB_OFF
DELB Pull-Down Current or
Resistance when Disabled
VDELB < 20V
500
nA
tVOFF
tVON
tVON-SLICE
AVDD to VOFF
VOFF to VON Delay
VON to VON-SLICE Delay
CDEL = 220nF
CDEL = 220nF
CDEL = 220nF
9
ms
20
ms
17
ms
Typical Performance Curves
100
80
VIN = 5V, AVDD = 15V
60
40
20
0
0
200
400
600
800
IOUT (mA)
FIGURE 1. AVDD EFFICIENCY vs IOUT
1000
0.10
0.05
0
VIN = 5V, AVDD = 15V
-0.05
-0.10
-0.15
-0.20
-0.25
-0.30
-0.35
0
200 400 600 800 1000 1200
IOUT (mA)
FIGURE 2. AVDD LOAD REGULATION vs IOUT
5
FN7493.3
April 24, 2009
Share Link: 