ISL8204M 데이터 시트보기 (PDF) - Intersil
부품명
상세내역
일치하는 목록
ISL8204M Datasheet PDF : 20 Pages
| |||
Pin Configuration
ISL8204M, ISL8206M
ISL8204M, ISL8206M
(15 LD QFN)
TOP AND 3D VIEW
9 87654321
PD1
1 PGND
15 NC
14 FB
13 COMP/EN
PHASE 10
PD2
PD4
12 VOUT
PD3
11 PGND
Pin Descriptions
PIN
1, 2, 3, 4
5
6, 8, 15
7
9
10
11
12
SYMBOL
DESCRIPTION
PGND
Power ground pin for signal, input, and output return path. PGND needs to connect to one (or more)
ground plane(s) immediately, which is recommended to minimize the effect of switching noise, copper
losses, and maximize heat dissipation. Range: 0V.
PVCC
This pin provides the bias supply for ISL8204M, ISL8206M, as well as the low-side MOSFET’s gate and
high-side MOSFET’s gate. If PVCC rises above 6.5V, an internal 5V regulator will supply to the internal
logics bias (but high-side and low-side MOSFET gate will still be sourced by PVCC). Connect a well
decoupled +5V or +12V supply to this pin. Connect 1µF ceramic capacitor to ground plane directly.
Range: 4.5V to 14.4V.
NC
No internal connection.
ISET
The ISET pin is the input for the overcurrent protection (OCP) setting, which compares the rDS(ON) of
the low-side MOSFET to set the overcurrent threshold. The ISL8204M, ISL8206M has an initial protect
overcurrent limit. It has an integrated internal 4.12kΩ/2.87kΩ resistor (RSET-IN) between the ISET
and PGND pins, which can prevent significant overcurrent impact to the module. One can also
connect an additional resistor RSET-EX between the ISET pin and the PGND pin in order to reduce the
current limit point by paralleling. Range: 0 to PVCC.
VIN
(PD1)
Power input pin. Apply input voltage between the VIN pin and PGND pin. It is recommended to place
an input decoupling capacitor directly between the VIN pin and the PGND pin. The input capacitor
should be placed as closely as possible to the module. Range: 1V to 20V.
PHASE
(PD2)
The PHASE pin is the switching node between the high and low side MOSFET. It also returns the current
path for the high side MOSFET driver and detects the low-side MOSFET drain voltage for the
overcurrent limits point. Range: 0V to 30V.
PGND
(PD3)
Power ground pin for signal, input, and output return path. PGND needs to connect to one (or more)
ground plane(s) immediately, which is recommended to minimize the effect of switching noise, copper
losses, and maximize heat dissipation. Range: 0V.
VOUT
(PD4)
Power output pin. Apply output load between this pin and the PGND pin. It is recommended to place
a high frequency output decoupling capacitor directly between the VOUT pin and the PGND pin. The
output capacitor should be placed as closely as possible to the module. Range: 0.6V to 6V.
3
FN6999.1
February 25, 2010
Share Link: 