IN74ACT273DW 데이터 시트보기 (PDF) - IK Semicon Co., Ltd

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IN74ACT273DW

Octal D Flip-Flop with Common Clock and Reset High-Speed Silicon-Gate CMOS

IK Semicon Co., Ltd 

IN74ACT273

AC ELECTRICAL CHARACTERISTICS (VCC=5.0 V ± 10%, CL=50pF,Input tr=tf=3.0 ns)

Symbol

Parameter

fmax Maximum Clock Frequency (Figure 1)

tPHL Propagation Delay, Clock to Q (Figure 1)

tPLH Propagation Delay, Clock to Q (Figure 1)

tPHL Propagation Delay, Reset to Q (Figure 2)

CIN Maximum Input Capacitance

Guaranteed Limits

25 °C

-40°C to 85°C

Min Max Min Max

125

125

3.0 10.0 2.5 11.0

3.0 11.0 2.5 12.0

3.0 11.0 2.5 11.5

4.5

4.5

Unit

MHz

ns

ns

ns

pF

CPD Power Dissipation Capacitance

Typical @25°C,VCC=5.0 V

50

pF

TIMING REQUIREMENTS (VCC=5.0 V ± 10%, CL=50pF, Input tr=tf=3.0 ns)

Symbol

Parameter

tsu

Minimum Setup Time, Data to Clock

(Figure 3)

th

Minimum Hold Time, Data to Clock

(Figure 3)

tw

Minimum Pulse Width, Clock (Figure 1)

tw

Minimum Pulse Width, Reset (Figure 2)

trec

Minimum Recovery Time, Reset to Clock

(Figure 2)

Guaranteed Limits

25 °C

-40°C to

Unit

85°C

4.5

5.5

ns

2.0

2.0

ns

4.0

4.5

ns

4.0

4.5

ns

2.0

3.0

Rev. 00

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