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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

IN74ACT163 데이터 시트보기 (PDF) - Integral Corp.

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IN74ACT163 Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
IN74ACT163
AC ELECTRICAL CHARACTERISTICS(VCC=5V±10% CL=50pF,Input tr=tf=3.0 ns)
Guaranteed Limits
Symbol
Parameter
25 °C
-40°C to
85°C
Min Max Min Max
fmax Maximum Clock Frequency (Figure 1) 120
105
tPLH Propagation Delay Clock to Q (Figure 1.5
1)
10.0 1.5 11.0
tPHL Propagation Delay Clock to Q (Figure 1.5
1)
11.0 1.5 12.0
tPLH Propagation Delay, Clock to Ripple 2.5
Cary Out (Figure 1)
11.5 2.0 13.5
tPHL Propagation Delay, Clock to Ripple 3.0
Cary Out (Figure 1)
13.5 2.0 15.0
tPLH Propagation Delay, Enable T to Ripple 2.0
Carry Out (Figure 2)
9.0 1.5 10.5
tPHL Propagation Delay, Enable T to Ripple 2.0
Carry Out (Figure 2)
10.0 2.0 11.0
CIN Maximum Input Capacitance
4.5
4.5
Unit
MHz
ns
ns
ns
ns
ns
ns
pF
CPD Power Dissipation Capacitance
Typical @25°C,VCC=5.0 V
45
pF
TIMING REQUIREMENTS (VCC=5.0V±10%, CL=50pF, Input tr=tf=3.0 ns)
Guaranteed Limit
Symbol
Parameter
+25° C
-40° C
Unit
to +85° C
tsu Minimum Setup Time, Preset Data Inputs to 10.0
Clock (Figure 4)
12.0
ns
th
Minimum Hold Time, Clock to Preset Data
0.5
Inputs (Figure 4)
0.5
ns
tsu Minimum Setup Time, Reset to Clock (Figure 10.0
3)
11.5
ns
th Minimum Hold Time, Clock to Reset (Figure -0.5
3)
-0.5
ns
tsu Minimum Setup Time, Load to Clock (Figure
8.5
5)
10.5
ns
th Minimum Hold Time, Clock to Load or Preset -0.5
Data Inputs (Figure 5)
0
ns
tsu Minimum Setup Time, Enable T or Enable P
5.5
to Clock (Figure 5)
6.5
ns
th Minimum Hold Time, Clock to Enable T or
0
Enable P (Figure 5)
0.5
ns
tw Minimum Pulse Width, (Load) (Figure 3)
3.5
3.5
ns
tw Minimum Pulse Width, (Count) (Figure 3)
3.5
3.5
ns
4

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