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IDT54FCT646TSO(2002) 데이터 시트보기 (PDF) - Integrated Device Technology

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IDT54FCT646TSO
(Rev.:2002)
IDT
Integrated Device Technology IDT
IDT54FCT646TSO Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
IDT54/74FCT646T/AT/CT
FAST CMOS OCTAL TRANSCEIVER/REGISTER (3-STATE)
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
Symbol
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tPLH
tPHL
tPLH
tPHL
tSU
tH
tW
Parameter
Propagation Delay,
Bus to Bus
Output Enable Time,
G, DIR to Bus
Output Disable Time,
G, DIR to Bus
Propagation Delay,
Clock to Bus
Propagation Delay,
SBA or SAB to Bus
Set-up Time HIGH or LOW,
Bus to Clock
Hold Time HIGH or LOW,
Bus to Clock
Clock Pulse Width,
HIGH or LOW
Condition(1)
CL = 50pF
RL = 500
54FCT646T
Mil.
Min.(2) Max.
2
11
54/74FCT646AT
Ind.
Mil.
Min.(2) Max. Min.(2) Max.
2
6.3
2 7.7
2
15
2
9.8
2 10.5
2
11
2
6.3
2 7.7
2
10
2
6.3
2
7
2
12
2
7.7
2 8.4
4.5 —
2
2—
2
1.5 — 1.5 —
6
5
5—
54/74FCT646CT
Ind.
Mil.
Min.(2) Max. Min.(2) Max. Unit
1.5 5.4 1.5 6 ns
1.5 7.8 1.5 8.9 ns
1.5 6.3 1.5 7.7 ns
1.5 5.7 1.5 6.3 ns
1.5 6.2 1.5 7 ns
2 — 2 — ns
1.5 — 1.5 — ns
5 — 5 — ns
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
6

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